Speaker
Mr
Marco Lattuada
(Politecnico di Milano)
Description
Acitvity: NEP
TO: Marco Zulianello/Software Systems Division
Since the core processors on space systems start to show their limits in terms of processing power and system budget (cost, power consumption, mass), the adoption of heterogeneous processors platforms (i.e., platforms with different types of processing elements such as general purpose processors and digital signal processors) will become necessary. With respect to single core systems, this type of architectures introduces new problems in the design flow of a task which needs to exploit multiple processing elements. Examples of these problems are how to divide the analysed task and to which processing element assign the different parts of the task. Moreover, adoption in the space system scenario further increases the complexity of the design process, since the predictability of the produced solutions has to be guaranteed. In this presentation, the research activity of a NPI contract trying to solve these issues is presented. Aim of this research is the
formulation and the implementation of a methodology to automatically port a sequential C code to a heterogeneous platform. The research in particular targets the MPPB platform developed by Recore. MPPB is an heterogeneous platform composed of a Leon2 processor, 2 Xentium DSPs, heterogeneous memories and high speed interfaces connected by a network-on-chip. The proposed design flow starts by the analysis of the C source code, possibly annotated with pragmas, which is performed exploiting the GNU GCC compiler. Task is then divided into chunks which are assigned and scheduled on the different processing elements of the platform. Finally, the source code corresponding to the solution and directly targeting the MPPB platform is produced.
