Conveners
SpW Evolutions II – SpaceFibre
- Martin Suess (ESA/ESTEC)
- David Jameux (ESA/ESTEC)
SpW Evolutions II – SpaceFibre
- There are no conveners in this block
Mr
Daniele Davalle
(University of Pisa)
11/12/2014, 09:45
Presentation
The current SpaceFibre draft standard F3 is the result of many iterations, reviews and prototyping. Despite the different revisions, there are not many independent implementations to prove that the current standard version is correctly and easily implementable.
In this activity, the SpaceFibre draft standard F3 has been taken as the only input for the implementation of a SpaceFibre CODEC....
Prof.
Steve Parkes
(University of Dundee)
11/12/2014, 11:15
The Very High Speed Serial Interface (VHiSSI) ASIC is the result of a European Framework 7 project.
This device will be described and a demonstration made of it operating as a SpaceWire to SpaceFibre bridge device, one of several modes of operation the chip supports.