22–24 Sept 2015
ESA/ESTEC
Europe/Amsterdam timezone

Independent implementation of the GigaSpace Wire codec on FPGA

24 Sept 2015, 09:35
15m
Einstein (ESA/ESTEC)

Einstein

ESA/ESTEC

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Presentation SpW Components SpW- and SpFi-related components

Speaker

Mr Grishin Viacheslav (Scientific Research Institute "Submicron")

Description

Independent development implementation of IP-cores- Codec Giga Space Wire on the basis of the standard’s draft SpaceWire-ENG Health check of the project at the lab bench Interoperability test with other implementations of Giga Space Wire (to be fullfilled)

Summary

Bench set test - confirmed the efficiency of the channel GIGA speed 2.5 Gbit/s

Interoperability tests are required

Primary author

Mr Grishin Viacheslav (Scientific Research Institute "Submicron")

Presentation materials