Name: SEFUW: SpacE FPGA Users Workshop, 3rd Edition
Start: 2016-03-15T09:30:00+01:00
End: 2016-03-17T17:00:00+01:00
Location: European Space Research and Technology Centre (ESTEC)

SEFUW: SpacE FPGA Users Workshop, 3rd Edition

from Tuesday 15 March 2016 (09:30) to Thursday 17 March 2016 (17:00)

Monday 14 March 2016
Tuesday 15 March 2016

09:55 Registration and Early Morning Networking Break sponsored by CNES CCT and ESA's Data System Division
Registration and Early Morning Networking Break sponsored by CNES CCT and ESA's Data System Division
09:55 - 10:25
Room: Newton 1 and 2
10:25 Welcome - David Merodio Codinachs (ESA) David Dangla (CNES)
Welcome
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
10:25 - 10:50
Room: Newton 1 and 2
10:50
10:50 - 12:35
Room: Newton 1 and 2
Contributions

10:50 Implementation of Space-Industry IP : A Comparison of Space-Grade FPGAs - Rajan Bedi (Spacechips Ltd.)

11:20 FPGA development flow for future large space FPGA - Florent MAnni (DC/TV/IN)

11:45 Prototyping a SOC on RTAX4000D for Solar Orbiter's Low Frequency Receiver. - Alexis Jeandet (Plasma Physics Laboratory)

12:10 LEON3/GRLIB for Space-Grade Programmable Devices Update and Roadmap - Jan Andersson (Cobham Gaisler AB)
12:35
12:35 - 13:00
Room: Newton 1 and 2
Contributions

12:35 Feedback on Xilinx Virtex-5QV FPGA - Florian Seychal (THALES ALENIA SPACE FRANCE)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:20
Room: ESTEC Canteen
14:20
14:20 - 14:45
Room: Newton 1 and 2
Contributions

14:20 SpaceWire and SpaceFibre on the Microsemi RTG4 FPGA - Chris McClements (STAR-Dundee)
14:45
14:45 - 16:00
Room: Newton 1 and 2
Contributions

14:45 Configuration Scrubbing and Mitigation Approaches for the Zynq System-on-Chip - Mike Wirthlin (Brigham Young University)

15:10 SET effects analysis and mitigation on Flash-based FPGAs - Luca Sterpone (Politecnico di Torino)

15:35 FT-UNSHADES2: the User Friendly Framework as an interface for designer support - Guzmán-Miranda Hipólito (Universidad de Sevilla)
16:00
16:00 - 16:25
Room: Newton 1 and 2
Contributions

16:00 Dyplo: software driven threaded FPGA development using partial reconfiguration techniques - Dirk van den Heuvel (Topic Embedded Products) Inge Rutten (Topic Embedded Systems)
16:25 Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
16:25 - 16:55
Room: Newton 1 and 2

16:55

16:55 - 18:55
Room: Newton 1 and 2
Wednesday 16 March 2016
08:50 SEFUW Intro - Opening Remarks - David Merodio Codinachs (ESA) David Dangla (CNES)
SEFUW Intro - Opening Remarks
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
08:50 - 09:00
Room: Newton 1 and 2
09:00
09:00 - 10:30
Room: Newton 1 and 2
Contributions

09:00 Microsemi RTG4 FPGAs – Product Overview, Update on Radiation and Reliability Testing - Ken O'Neill (Microsemi)

10:00 ATMEL AT40K RHBD FPGA last news - Bernard BANCELIN (ATMEL Nantes S.A.S.)
10:30 Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
10:30 - 11:00
Room: Newton 1 and 2
11:00
11:00 - 12:00
Room: Newton 1 and 2
Contributions

11:00 Common Subsystems Design Requirements for Performance and Reliability in an FPGA - Ching Hu (Intel Corporation)
12:00
12:00 - 12:35
Room: Newton 1 and 2
Contributions

12:00 The Benefits of Feedback TMR for SEU Tolerance of SRAM FPGA Designs - Mike Wirthlin (Brigham Young University)
12:35
12:35 - 13:00
Room: Newton 1 and 2
Contributions

12:35 Resource-Efficient Debugging Core to Evaluate FPGA Designs in On-Board Processors - Florian Rittner (Friedrich-Alexander-Universität Erlangen-Nürnberg)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:00
Room: ESTEC Canteen
14:00
14:00 - 15:15
Room: Newton 1 and 2
Contributions

14:00 Experience gained in Flash-based FPGA for InSight - Stephane Humbert (Syderal SA)

14:25 Spartan 6 Evaluation for Space Application - Tim Pike (Airbus DS)

14:50 High Performance COTS based Computer with FPGA's implementation - Olivier NOTEBAERT (Airbus Defence and Space)
15:15
15:15 - 15:40
Room: Newton 1 and 2
Contributions

15:15 High-Performance Scientific Computing on FPGA aboard the Solar Orbiter PHI Instrument - Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)
15:40 Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
15:40 - 16:10
Room: Newton 1 and 2
16:10
16:10 - 16:35
Room: Newton 1 and 2
Contributions

16:10 High Performance CCSDS Image Compression Implementations on Space-Grade SRAM FPGAs - Nektarios Kranitis (Dept. of Informatics & Telecommunications, National and Kapodistrian University of Athens)
16:35
16:35 - 17:25
Room: Newton 1 and 2
Contributions

16:35 OLT(RE)²: A Tool Flow for Mitigation of Permanent Faults in Reconfigurable Systems - Dario Cozzi (Univesity of Bielefeld) Sebastian Korf (Bielefeld University)

17:00 Using Dynamic Circuit Specialisation to Enable Microreconfigurations for Space Applications - Amit Kulkarni (Ghent University)
17:25 Wrap up and Open discussion - David Merodio Codinachs (ESA) David Dangla (CNES)
Wrap up and Open discussion
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
17:25 - 17:55
Room: Newton 1 and 2
20:00 SEFUW Dinner
SEFUW Dinner
20:00 - 22:30
Thursday 17 March 2016
08:50 SEFUW Intro - Opening Remarks - David Merodio Codinachs (ESA) David Dangla (CNES)
SEFUW Intro - Opening Remarks
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
08:50 - 09:00
Room: Newton 1 and 2
09:00
09:00 - 11:30
Room: Newton 1 and 2
Contributions

09:00 NanoXplore NXT-32000 FPGA - Olivier Lepape (NanoXplore)

10:00 Xilinx Virtex-5QV Update and Space Roadmap - Kangsen Huey (Xilinx, Inc.)
11:30 Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division
11:30 - 11:45
Room: Newton 1 and 2
11:45
11:45 - 12:10
Room: Newton 1 and 2
Contributions

11:45 Heavy-Ion Micro Beam Study of Flash-Based FPGA Microcontroller Implementation - Adrian Evans (IROC Technologies)
12:10
12:10 - 13:00
Room: Newton 1 and 2
Contributions

12:10 FPGA acceleration in GMV projects for Space Vision-based GNC systems - David Gonzalez-Arjona (GMV Aerospace and Defence)

12:35 FPGA acceleration of computer vision and optimization for European space applications - George Lentaris (National Technical University of Athens, Greece)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:00
Room: ESTEC Canteen
14:00
14:00 - 14:25
Room: Newton 1 and 2
Contributions

14:00 Fast In-Orbit FPGA Reconfiguration via In-Band TM/TC - Christopher Stender (Fraunhofer Institute for Integrated Circuits IIS)
14:25
14:25 - 15:15
Room: Newton 1 and 2
Contributions

14:25 Single Event Effect Test on 28nm FPGA - Pierre Garcia (TRAD)

14:50 An overview of FPGA use in the LHC accelerator and the CERN experiments - Salvatore Danzeca (CERN)
15:15
15:15 - 16:05
Room: Newton 1 and 2
Contributions

15:15 Enhancing the Reliability of COTS SRAM-based FPGAs with Microreconfiguration for SEU Mitigation in Space Applications - Alexandra Kourfali (Ghent University / ESA)

15:40 Highly Reliable System-on-Chip using Dynamically Reconfigurable FPGAs - Luca Sterpone (Politecnico di Torino)
16:05 Concluding remarks and closure - David Merodio Codinachs (ESA) David Dangla (CNES)
Concluding remarks and closure
- David Merodio Codinachs (ESA)
- David Dangla (CNES)
16:05 - 16:30
Room: Newton 1 and 2

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