Conveners
Fault Tolerance Methodologies and Tools
- David Dangla (CNES)
Fault Tolerance Methodologies and Tools
- Agustin Fernandez-Leon (ESA)
Fault Tolerance Methodologies and Tools
- Florent Manni (DC/TV/IN)
Fault Tolerance Methodologies and Tools
- David Merodio Codinachs (ESA)
Mike Wirthlin
(Brigham Young University)
15/03/2016, 14:45
The Xilinx Zynq programmable system-on-chip offers new capabilities for spacecraft systems by integrating two ARM A9 processors along with programmable logic on the same silicon die. Tightly coupling embedded processors with a programmable logic fabric facilitates hybrid computing systems that use the processors for higher-level sequential processing and the programmable logic for parallel...
Prof.
Luca Sterpone
(Politecnico di Torino)
15/03/2016, 15:10
Flash-based Field Programmable Gate Arrays (Flash-based FPGAs) are becoming more and more interesting for safety critical applications due to their re-programmability features while being non-volatile. However, Single Event Transients (SETs) in combinational logic represent their primary source of critical errors since they can propagate and change their shape traversing combinational paths...
Dr
Guzmán-Miranda Hipólito
(Universidad de Sevilla)
15/03/2016, 15:35
FT-UNSHADES2 is a framework dedicated to fault injection in both ASIC netlists and FPGA devices. This system has been conceived to perform, in the same environment, large injection campaigns and detailed analysis without additional user efforts.
The team at Universidad de Sevilla has created a system that is remotely accessible, avoiding the necessity of having the hardware device present....
Mike Wirthlin
(Brigham Young University)
16/03/2016, 12:00
Modern SRAM Field Programmable Gate Arrays (FPGAs) provide a large amount of logic, computing, and I/O resources that can be programmed in the field through device configuration. FPGAs are also increasingly including a variety of fixed circuits such as programmable processors and high-speed I/O interfaces to facilitate the development of complex, single-chip programmable systems. Like all...
Mr
Dario Cozzi
(Univesity of Bielefeld), Mr
Sebastian Korf
(Bielefeld University)
16/03/2016, 16:35
Reconfigurable systems are more and more employed in many application fields, including aerospace. SRAM-based FPGAs represent an extremely interesting hardware platform for this kind of systems, because they offer flexibility as well as processing power. Furthermore, the ability of run time reconfiguration of SRAM-based FPGAs can provide advantages for many applications. The scope of this...
Mr
Amit Kulkarni
(Ghent University)
16/03/2016, 17:00
Dynamic Circuit Specialisation (DCS) allows an FPGA design to be dynamically specialized for a subset of its infrequently changing inputs (parameters). Instead of implementing these parameter inputs as regular inputs, in the DCS approach these inputs are implemented as constants and the design is optimized for these constants. When the parameter values change, the design is re-optimized for...
Ms
Alexandra Kourfali
(Ghent University / ESA)
17/03/2016, 15:15
SRAM-based logic devices such as FPGAs are susceptible to SEUs and functional interruptions in harsh radiation environments, such as space. Several mitigation techniques have been used in order to sustain the functionality of the design, after SEUs are detected and corrected. However, the majority of these mitigation techniques (e.g. TMR) introduce area overhead in the original design. We...
Prof.
Luca Sterpone
(Politecnico di Torino)
17/03/2016, 15:40
Radiation-induced Soft Errors are widely known since the advent of dynamic RAM chips. Reconfigurable FPGA devices based on SRAM configuration memories are extremely sensitive to these effects resulting in an unwelcome change of behavior in digital logic. Indeed, soft errors occur today as a result of radiation from space or even at sea level. Detection, protection and mitigation of soft errors...
