Speaker
Mr
Nicolas Sukhaseum
(TRAD)
Description
The aim of this study is to investigate the proton direct ionization sensitivity of integrated circuits. This work includes the development of a calculation methodology to assess the direct ionization contribution to the proton SEE rate, the experimental characterization of a 45nm CMOS SRAM-based FPGA under low energy proton, as well as the space environment and calculation parameter impact on the presented methodology.
