Name: SEFUW: SpacE FPGA Users Workshop, 5th Edition
Start: 2020-03-17T09:15:00+01:00
End: 2020-03-19T17:00:00+01:00
Location: European Space Research and Technology Centre (ESTEC)

SEFUW: SpacE FPGA Users Workshop, 5th Edition

from Tuesday 17 March 2020 (09:15) to Thursday 19 March 2020 (17:00)

Monday 16 March 2020
Tuesday 17 March 2020

09:15 Registration and Networking Coffee Break
Registration and Networking Coffee Break
09:15 - 10:00
Room: Newton 1 and 2
10:00
10:00 - 11:40
Room: Newton 1 and 2
Contributions

10:00 Challenges with New FPGA Technologies - Isaac Tejerina Bustillo (Airbus Defence & Space)

10:25 MPSOCS FOR RECONFIGURABLE MODULAR SPACECRAFT - Matthew Rowlings (Staff)

10:50 Development and FPGA Roadmap for LEON5FT and NOEL-V Processor Models - Martin Ronnback (Cobham Gaisler)

11:15 SpaceFibre and SpaceWire IP cores for radiation tolerant FPGAs - Chris McClements (STAR-Dundee) Steve Parkes (STAR-Dundee)
11:40
11:40 - 13:00
Room: Newton 1 and 2
Contributions

11:40 Getting Started with OSVVM, VHDL's #1 Verification Methodology - Jim Lewis (SynthWorks Design Inc.)

12:10 Using Static RTL Analysis to Accelerate Space FPGA Verification - adam adam taylor (Adiuvo Engineering & Training Ltd)

12:35 A UML Profile for VHDL FPGA Designs. - Harald Ottacher (Space Research Institute / Austrian Academy of Sciences)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:00
Room: ESTEC Canteen
14:00
14:00 - 15:00
Room: Newton 1 and 2
Contributions

14:00 Saving Power and System Cost with Microchip Radiation Tolerant FPGAs - Ken O'Neill (Microchip Technology)
15:00
15:00 - 16:30
Room: Newton 1 and 2
Contributions

15:00 Automation of achieving Functional Safety and Highly Reliable Design - Philipp Jacobsohn (Synopsys GmbH)

15:20 Harsher-than-space: Fault injection and user-based RHBD in the age of rad-tolerant and rad-hard devices - Hipólito Guzmán-Miranda (Universidad de Sevilla)

15:45 VeriPy: A Python Framework for the analysis and mitigation of soft-errors effects in SRAM-based FPGAs - Corrado De Sio (Politecnico di Torino)

16:00 Accurate Estimation of NXmap Circuit Performance and Reliability by Static Analysis and Simulation - Luca Sterpone (Politecnico di Torino)

16:15 New extensions for the LEON2FT IP core - Martin Danek (daiteq)
16:30 Networking Coffee Break
Networking Coffee Break
16:30 - 17:00
Room: Newton 1 and 2

17:00 Demo Session/Exhibit and Welcome Reception
Demo Session/Exhibit and Welcome Reception
17:00 - 19:00
Room: Wintergarden South
Wednesday 18 March 2020

08:50 SEFUW Intro - Opening Remarks
SEFUW Intro - Opening Remarks
08:50 - 09:00
Room: Newton 1 and 2
09:00
09:00 - 10:30
Room: Newton 1 and 2
Contributions

09:00 Webex session: Methods for Mission-Critical Survivability Analysis - Melanie Berg (Space R2 LLC)

09:50 Methodologies and tools to efficiently perform fault campaigns to measure functional safety - Joerg Richter (Group Director R&D, Verification Group)

10:10 Configuration Memory Scrubber for the Xilinx Zynq-7000 FPGA based on a 2D coding scheme - Mihalis Psarakis (University of Piraeus, Greece)
10:30
10:30 - 11:20
Room: Newton 1 and 2
Contributions

10:30 FPGA Based Reconfigurable On-Board Payload Processing for an Exploratory In-Orbit Verification of an E-Band (71-76 GHz) Satellite Link (EIVE) - Laura Manoliu (University of Stuttgart)

10:55 Use of Cyclone V SoC in OPS-SAT mission of ESA - Vasundhara Shiradhonkar
11:20 Networking Coffee Break
Networking Coffee Break
11:20 - 11:50
Room: Newton 1 and 2
11:50
11:50 - 13:00
Room: Newton 1 and 2
Contributions

11:50 FPGA continuous integration - Florent MAnni (DC/TV/IN)

12:10 UVVM usage is exploding. A brief introduction and all the new stuff for this standardised VHDL verification methodology. - Espen Tallaksen (Bitvis)

12:40 Accelerating the Journey from C/C++ to Hardware - Pantelis Sarais (Silexica)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:00
Room: ESTEC Canteen
14:00
14:00 - 15:00
Room: Newton 1 and 2
Contributions

14:00 Xilinx’s Adaptive FPGAs for Space Applications - Minal Sawant (Xilinx Inc.)
15:00
15:00 - 16:15
Room: Newton 1 and 2
Contributions

15:00 Computer Vision Acceleration on NG-MEDIUM and NG-LARGE FPGAs for Rovers - George Lentaris (National Technical University of Athens, Greece)

15:25 Modulable architecture for image processing systems - Rubén Domingo Torrijos (GMV)

15:50 Performance Assessment of Onboard CCSDS Forward Error Correction on Space FPGAs - Nektarios Kranitis (Dept. of Informatics &amp; Telecommunications, National and Kapodistrian University of Athens)
16:15 Networking Coffee Break
Networking Coffee Break
16:15 - 16:45
Room: Newton 1 and 2
16:45
16:45 - 17:35
Room: Newton 1 and 2
Contributions

16:45 RTG4 FPGA in ATHENA WFI - Markus Plattner (Max Planck Institute for extraterrestrial Physics)

17:10 The data processing unit for the PMI instrument aboard the Lagrange mission - Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)
17:35 Round Table
Round Table
17:35 - 18:30
Room: Newton 1 and 2

19:30 SEFUW Dinner
SEFUW Dinner
19:30 - 21:30
Thursday 19 March 2020

08:50 SEFUW Intro - Opening Remarks
SEFUW Intro - Opening Remarks
08:50 - 09:00
Room: Newton 1 and 2
09:00
09:00 - 10:00
Room: Newton 1 and 2
Contributions

09:00 NanoXplore NXmap-v3 features and updated NX products portfolio - JOEL LE MAUFF (NanoXplore)
10:00
10:00 - 10:50
Room: Newton 1 and 2
Contributions

10:00 Fault tolerance analysis of iterative processing data-paths - Alexandru Amaricai (University Politehnica Timisoara)

10:25 Radiation tolerant CAN controller for Xilinx FPGAs - Simon Voigt Nesbo (Western Norway University of Applied Sciences)
10:50 Networking Coffee Break
Networking Coffee Break
10:50 - 11:20
Room: Newton 1 and 2
11:20
11:20 - 13:00
Room: Newton 1 and 2
Contributions

11:20 Xilinx Machine Learning Solutions and Design Considerations for Space Applications - Jason Vidmar (Xilinx Corp)

11:45 Image Recognition for Space Applications using Deep Learning on FPGAs & SoCs - Stephan van Beek (MathWorks)

12:10 FPGA implementation of Cloud Detection algorithm based on Convolutional Neural Network for Earth Observation applications On board - Giamarco Dinelli (University Of Pisa) Gionata Benelli (IngeniArs)

12:35 Intel’s Solution for Fast and Efficient Inference - Ruth Abra (Intel)
13:00 Networking Luncheon
Networking Luncheon
13:00 - 14:00
Room: ESTEC Canteen
14:00
14:00 - 14:15
Room: Newton 1 and 2
Contributions

14:00 FUSIO RT update: First European Space Computer Core, Ready to use - Coralie Dang Feller (3DPLUS)
14:15
14:15 - 14:35
Room: Newton 1 and 2
Contributions

14:15 3D PLUS CONFIGURATION MEMORY SOLUTIONS - Jeanne TONGBONG

14:25 High Performance Memories To Augment Space FPGA s - Helmut Puchner (Cypress Semiconductor)
14:50
14:50 - 16:30
Room: Newton 1 and 2
Contributions

14:50 First Design-In Experiences and Comparison of KU060, NG-ULTRA and RTPolarFire for On-Board Processing and AI - Rajan Bedi (Spacechips)

15:15 Flexible FPGA Architecture for Compact High-Performance PDHU and OBC Mass Memory - Gang Zhou (DSI Aerospace Technologie GmbH )

15:40 Xilinx Zynq Ultrascale+ MPSoC-based modular unit for rapid spacecraft hardware prototyping - Michael Walshe (Thales Alenia Space)

16:05 Designing a low-latency Fail-operational motor controller for space on industrial-grade FPGAs - Aloïs Wolff (Watt&Well)
16:30 Concluding remarks and closure
Concluding remarks and closure
16:30 - 17:00
Room: Newton 1 and 2

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