EDHPC 2023 - European Data Handling & Data Processing Conference

Session

DFTS

4 Oct 2023, 14:00

Salle Louis Armstrong

Conveners

DFTS: Special Session #3 - Towards AI-based cross-layer resilience: from reliability estimation at design phase to in-field error detection and on-chip sensor data processing

• Mihalis Psarakis (University of Piraeus, Greece)

DFTS: Special Session #4 - Resilience of Brain-Inspired Applications: Test and Reliability for Modern ML and AI Hardware Implementations

• Elena-Ioana Vatajelu
• Ernesto Sanchez

DFTS: Session 4: Radiation, Soft Errors and Security

• Paolo Maistri

DFTS: Session 5: Applications and Security

• Ernesto Sanchez

DFTS: Special Session #5 - Testing, Reliability, and Hardware Security of Computing-in Memories

• Jin-Fu Li

DFTS: Closing Session

• Gianluca Furano (ESA/Data Systems Division)
• Luca Cassano (Dipartimento di Elettronica, Informatica e Bioingegneria - Politecnico di Milano)

DFTS: Keynote 3: State of the Art of Functional Safety in 2023

• Mauro Pipponzi
• Luca Cassano (Dipartimento di Elettronica, Informatica e Bioingegneria - Politecnico di Milano)

236. Challenges in Machine Learning Techniques to Estimate Reliability from Transistors to Circuits

Florian Klemme

04/10/2023, 14:00

Presentation

237. On-Chip Sensors Data Collection and Analysis for SoC Health Management

Konstantin Shibin

04/10/2023, 14:20

238. A Machine Learning-driven EDAC Method for Space-Application Memory

Junchao Chen

04/10/2023, 14:40

252. Testing and Reliability of Spiking Neural Networks: A Review of the State-of-the-Art

Haralampos Stratigopoulos

04/10/2023, 15:00

Presentation

253. On the resilience of representative and novel data formats in CNNs

Edgar Sanchez Sanchez

04/10/2023, 15:20

254. Fault tolerance of memristor-based neural networks: a comparative study between formal and spiking neural networks

Elena-Ioana Vatajelu

04/10/2023, 15:40

Presentation

239. Neutron Radiation Tests of the NEORV32 RISC-V SoC on Flash-Based FPGAs., Kevin Böhmer, Bruno Forlin, Carlo Cazzaniga, Paolo Rech, Gianluca Furano, Nikolaos Alachiotis and Marco Ottavi

Bruno Forlin

05/10/2023, 10:50

240. Accurate Soft Error Rate Evaluation Using Event-Driven Dynamic Timing Analysis., Georgios-Ioannis Paliaroutis, Pelopidas Tsoumanis, Dimitrios Garyfallou, Anastasis Vagenas, Nestor Evmorfopoulos and George Stamoulis

Dimitrios Garyfallou

05/10/2023, 11:10

241. Towards a Comprehensive SET Analysis Flow for VLSI Circuits using Static Timing Analysis., Christos Georgakidis, Dimitris Valiantzas, Stavros Simoglou, Iordanis Lilitsis, Nikolaos Chatzivangelis, Marko Andjelkovic, Christos Sotiriou and Milos Krstic

Christos Georgakidis

05/10/2023, 11:30

Presentation

242. On the Prediction of Hardware Security Properties of HLS Designs Using Graph Neural Networks., Amalia-Artemis Koufopoulou, Athanasios Papadimitriou, Aggelos Pikrakis, Mihalis Psarakis and David Hely

Athanasios Papadimitriou

05/10/2023, 11:50

Presentation

243. QuardTropy: Detecting and Quantifying Unauthorized Information Leakage in Hardware Designs using g-entropy., Hasan Al-Shaikh, Mohammad Bin Monjil, Kimia Zamiri Azar, Farimah Farahmandi, Mark Tehranipoor and Fahim Rahman

Hasan Al-Shaikh

05/10/2023, 12:10

244. SASL-JTAG: A Light-Weight Dependable JTAG., Senling Wang, Shaoqi Wei, Jun Ma, Hiroshi Kai, Yoshinobu Higami, Hiroshi Takahashi, Akihiro Shimizu, Xiaoqing Wen and Tianming Ni

Senling Wang

05/10/2023, 14:00

245. A Low-Cost Hardware Accelerator for CCSDS 123 Lossless Hyperspectral Image Compression., Wesley Grignani, Douglas Santos, Luigi Dilillo, Felipe Viel and Douglas Melo

Luigi Di Lillo

05/10/2023, 14:20

Presentation

246. RC-IJTAG: A Methodology for Designing Remotely-Controlled IEEE 1687 Scan Networks., Payam Habiby, Sebastian Huhn and Rolf Drechsler

Payam Habiby

05/10/2023, 14:40

Presentation

247. Iterative Mitigation of Insecure Resource Sharing Produced by High-level Synthesis., Zahin Ibnat, Hadi Mardani Kamali and Farimah Farahmandi

Zahin Ibnat

05/10/2023, 15:00

Presentation

248. Exploration of System-on-Chip Secure-Boot Vulnerability to Fault-Injection by Side-Channel Analysis., Clément Fanjas, Aboulkassimi Driss, Jessy Clédière and Simon Pontié

Clément Fanjas

05/10/2023, 15:20

Presentation

249. Testing of Computing-In Memories: Faults, Test Algorithms, and Design-for-Testability

Jin-Fu Li

05/10/2023, 16:10

Presentation

250. Reliability of Computing-In-Memories: Threats, Detection Methods, and Mitigation Approaches

Yu-Guang Chen

05/10/2023, 16:30

Presentation

251. Hardware Trojans of Computing-In-Memories: Issues and Methods

Shih-Hsu Huang

05/10/2023, 16:50

Presentation