Speaker
Description
Space applications are increasingly incorporating analysis and decision-making capabilities to derive insights from data flows. This requires designers to adopt advanced technology that accelerates design, verification, and debugging of system designs.
• Hardware: Architectural investigation, IP integration, advanced verification, fast debug, and efficiently using the integrated hard blocks (SERDES, PCIe®, and DDR)
• Software: Early pre-hardware software design, operating system build infrastructure, software algorithm acceleration, find and fix software bugs early
• Integration: Co-simulation of hardware and software, system-level debug, and fast iteration using fully scripted flows
PolarFire® Studio is a comprehensive suite of development tools targeting Microchip’s PolarFire 2 FPGAs supporting RTL and C/C design flows to accelerate design, verification, and debug of FPGA systems. It combines FPGA Designer, System Designer, Microchip IP and reference designs to provide engineers with a system level design tool for the next generation space applications.
PolarFire® FPGA Designer is a comprehensive and modern development tool designed for Microchip FPGAs. It features an intuitive and user-friendly graphical interface that supports the traditional RTL to bitstream workflow, while also offering additional capabilities for rapid design, verification, and debugging. This includes a fully scripted flow, fast design constraint creation and integration, advanced static timing and power analysis with visualization, industry-leading QuestaSim Core OEM edition simulator and the ability to find and fix bugs faster with enhanced system debug.
The integrated IP vault provides designers with direct access to intellectual property (IP), providing an air gapped design option, necessary to efficiently complete applications. Quickly completing the setup and configuration of integrated hard blocks, custom logic implementation and IP portability across designs.
PolarFire System Designer integrates system-level analysis and design tool optimizations for developing embedded software applications running on Microchip FPGAs. Designers can maintain a unified code base for application, vector processing, and high-level synthesis using abstracted C/C workflows, supporting modular design across various project types, catering to multiple design personas. Developers can take advantage of the support for RISC-V® processor compile, debug, and execution of embedded software, high-level synthesis to automatically compiled C/C functions to RTL for fast verification and analysis and embedded software/hardware accelerators to create a RISC-V-based SoC
This presentation will discuss methods for developers to efficiently model complex systems from power planning through full design with high-level abstractions to low-level control while offering low power, high reliability and quantum security.
Affiliation of author(s)
Microchip
| Track | Design Flow |
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