Speaker
Description
The evolving landscape of space system applications demands flexibility, high-performance, and robustness, particularly in high rate data acquisition, processing and transfer. Traditional FPGA families struggle to meet these demanding requirements due to the limitation of internal resources and the fixed nature of one-time programmable FPGAs.
Microchip's RTG4 FPGAs offer a solution to these challenges with reprogramming capabilities, radiation-hardened technology, and low-power digital microelectronics designed specifically for space applications. These features make RTG4 FPGAs ideal for mission-critical applications in demanding environments.
This abstract presents three Airbus Crisa products using RTG4 devices, focusing on their innovative features, benefits, and challenges encountered during development.
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High-performance Imaging Analog Front Ends: Airbus Crisa successfully developed an RTG4 FPGA-based solution managing nearly 90% of the internal memory for enhanced data processing bandwidth. This advancement significantly improved data processing capabilities in a single FPGA, demonstrating the technology's potential for high-performance space applications.
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Science Data Processing in Instrument Control Unit (ICU) applications: The equipment receives science data from three Front End Electronics (FEEs) at 525 x 3 Mbps. The RTG4 FPGA design includes packetization and transfer of data to the Mass Memory Unit (MMU) using a 2 Gbps WizardLink, presenting challenge’s regarding jitter and skew requirements for reliable communication between FPGAs in the FEE application. The equipment is connected to a microprocessor via a 100 Mbps SpaceWire (SpW) for Command & Control and System Housekeeping telemetry data reception.
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Payload Controller Module (PCM): The Airbus Crisa PCM, an Advanced Data Handling Architecture (ADHA)-compliant module, acts as a system slot for payload applications and offers flexibility through a reprogrammable RTG4 FPGA and multiple interface standards provided by the GR740 SoC processor. The RTG4 FPGA design implements a 6-port SpaceWire (SpW) router and 1 additional SpW port with RMAP used for command and control (all the SpW working at 200 Mbps), SpaceFibre optical links at 2.5 Gbps, and various controllers, including FLASH, SDRAM, and microprocessor boot management from FLASH. It is also capable of storing automatically in FLASH data inputs without software intervention.
These Airbus Crisa designs using RTG4 FPGAs present a wide range of applications that allow for addressing significant challenges, such as:
· High clock frequencies
· High use of internal memory blocks
· Handling multiple independent clocks using internal clocking resources
· Adapting functional blocks due to high complexity in reset architecture or to meet jitter and skew requirements.
· Careful pinout selection to allow the use of LVDS, SERDES, different voltage IOs etc.
The final presentation will go deeper into these challenges and the solutions adopted in the mentioned Airbus Crisa products.
Affiliation of author(s)
Airbus Crisa
| Track | FPGAs: High Performance |
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