Speaker
Description
Model-based approaches are widely adopted in the aerospace industry to streamline the implementation of command laws. In this context, Field Programmable Gate Arrays (FPGAs) play a crucial role in deploying Guidance, Navigation, and Control (GNC) algorithms for aerospace systems, offering the benefits of massively parallel computational capabilities and predictable execution times. Traditionally, real-time system implementations based on model-based designs rely on dataflow-synchronous programming languages. Previous research has focused on compiling these languages into Register Transfer Level (RTL) models using Hardware Description Languages (HDL) through high-level synthesis (HLS). Whereas these methods allow for high-level system specification, the compilation process is often lengthy, lacks traceability, and may compromise the synchronous dataflow properties of the original programs.
To address these limitations, alternative approaches have explored the use of intermediate representations to compile programming languages directly into FPGA netlists through pattern-matching techniques.
Building on this concept, in collaboration with CNES (French space agency), we demonstrate how such an intermediate representation can efficiently generate FPGA netlists from dataflow programming languages for the synthesis of GNC algorithms. Our methodology introduces Pyxis, a toolchain that provides a fast, predictable synthesis process with enhanced traceability. This approach improves the efficiency and reliability of FPGA-based implementations for aerospace applications. Future work will focus on simulating nanosatellite control systems implemented using Pyxis.
Affiliation of author(s)
Fédération ENAC ISAE-SUPAERO ONERA Université de Toulouse , CNES (DSO/TB/ET)
Track | High Level Synthesis and Model Based Design |
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