SEFUW: SpacE FPGA Users Workshop, 2nd Edition

Xilinx Space Grade Packaging & Development Updates

17 Sept 2014, 10:00

40m

Newton 2 (European Space Research and Technology Centre (ESTEC))

FPGA/CAD Vendors

Speaker

Mr Daniel Elftmann (Xilinx)

Description

Xilinx has been producing Space grade Field Programmable Gate Array (FPGA) with flip chip ceramic column grid array packages since 2008 with its Virtex-4 FPGA family, adding Virtex-5 in 2011. This type of package is not well understood by the space community, and the JEDEC JC-13 participants and DLA-LM spent the past several years to develop the class Y Non-Hermetic Ceramic Packaging and released it in MIL-PRF-38535, revision K. This presentation will describe the construction of the Non-Hermetic Ceramic Flip Chip Column Grid Array package, its unique characteristics, advantages, and limitations. In addition, descriptions will be provided on recent package modification and assembly site change, plus the associated qualification requirement and current progress.