Speakers
Mr
Rémi Sarrere
(EREMS)Ms
Sandrine Zaouche
(EREMS)
Description
EREMS designs FPGAs according to a development flow which contains the following steps: final target selection, prototypes realisations, VHDL design including synthesis, place and route, performance analysis and finally component programming. The presentation outlines EREMS FPGA feedback based on space projects examples like CARMEN, PVL, TARANIS and CPUGEN. These missions are interesting to point out because they contain substantial designs relied on a range of FPGA targets: Microsemi RTSX and RTAX series, and ATMEL ATF series.
Primary authors
Mr
Rémi Sarrere
(EREMS)
Ms
Sandrine Zaouche
(EREMS)
