15–17 Mar 2016
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
All available presentations have been posted

High-Performance Scientific Computing on FPGA aboard the Solar Orbiter PHI Instrument

16 Mar 2016, 15:15
25m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Speaker

Dr Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)

Description

SO/PHI (Solar Orbiter Polarimetric and Helioseismic Imager) is a filtergraph-based, solar magnetograph aimed at mapping the vector magnetic field and the line-of-sight (LOS) velocity of the solar photospheric plasma. It belongs to the scientific payload of the European Space Agency’s Solar Orbiter mission which will orbit the Sun at 0.28 astronomical units. The limited telemetry rate combined with the large amount of scientific information retrieved by the SO/PHI instrument demand a sophisticated on-board data reduction and scientific analysis through the study of the polarization state of a specific spectral line. The main aim is to perform the complicated algorithm needed to translate the polarization state of the light spectrum in terms of some specific solar parameters like the magnetic field vector and velocity. Technically speaking, the inference of the solar physical quantities through a spectropolarimetric study is based on the inversion of the Radiative Transfer Equation (RTE) and these tasks require the processing of a huge quantity of data in parallel. The RTE inverter is the core of the on-board scientific data analysis and, probably, one of the most innovative parts of the instrument. Due to the unavailability of qualified for space processors, DSPs, or GPGPUs that fulfil the stringent computational requirements with the limited room and power consumption allocated to the instrument, a specifically designed hardware device has been implemented in SO/PHI. This device is in charge of inverting the RTE aboard Solar Orbiter under narrow time and power constraints. The main aim of this work is to design, build, and test such a hardware device for SO/PHI. With that goal in mind, we propose a high-performance computing architecture for carrying out the RTE inversion using FPGA devices embedded in the SO/PHI instrument. The computing proposal consists of a SIMD multiprocessor architecture to reach high performance in floating point operations. This architecture on a Virtex-4 FPGA squeezes the FPGA resources in order to reach the time constraints. It is focused in exploiting the data parallelism using several processors working together and using different data streams. One of the most important contributions of this architecture is the ability of saving resources allocating operation cores in a shared operation block, which is accessed by every processor. Some details for extending the architecture to other problems are pointed out. Using the SIMD architecture, the challenge of carrying out the RTE inversion in less than 15 minutes has been reached. The architecture has not only demonstrated that is able to do it but it is also improves the computing capabilities of ground systems by more than ten times using a relatively slow (and 10 year-old) Virtex-4 FPGA device. The RTE inverter prototype has been tested using real images taken by another instrument. It is able of working as accurately as usual computers regarding the scientific precision. In addition, it has satisfied the stringent requirements of power consumption and processing time.

Summary

In this work we propose a multiprocessor architecture to reach high performance in floating point operations by using radiation tolerant FPGA devices, and under narrow time and power constraints. This architecture is used in the PHI instrument that carries out the scientific analysis aboard the ESA’s Solar Orbiter mission. Some details for extending the architecture to other problems are pointed. The proposed architecture squeezes the FPGA resources in order to reach the computational requirements and improves the ground-based system performance based on commercial CPUs regarding time and power consumption.

Primary author

Dr Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)

Co-authors

Dr Antonio C. López Jiménez (Institute of Astrophysics of Andalusia) Mrs Beatriz Aparicio del Moral (Institute of Astrophysics of Andalusia) Dr Jose C. del Toro Iniesta (Institute of Astrophysics of Andalusia) Mr Jose L. Ramos Mas (Institute of Astrophysics of Andalusia) Dr Maria Balaguer Jiménez (Institute of Astrophysics of Andalusia)

Presentation materials