Speaker
Mr
Florent MAnni
(DC/TV/IN)
Description
The FPGA available for Rad-tolerant or Rad-Hard applications are quite small (with regard to their commercial brothers). Some are SRAM based, many are antifusible based. The development flow described inside the ECSS-Q-60-02 standard is well fitted for this kind of targets. The next generation of FPGA for space application will include bigger FPGA matrix most of them SRAM or flash based. The mix between biggest and reprogrammable matrix will lead to longer FPGA development and new strategies to handle it. This kind of development will match less easily with the ECSS standard. During this presentation two different FPGA development examples will be described: one using FPGA Proasic3 and the other using the SOC Zynq.
Primary author
Mr
Florent MAnni
(DC/TV/IN)
