2–6 Oct 2023
ANTIPOLIS - Palais des Congrès d'Antibes
Europe/Amsterdam timezone

IngeniArs IP Cores for on-board high-speed data interfaces

5 Oct 2023, 15:00
20m
Salle Sidney Bechet

Salle Sidney Bechet

Presentation Protocol Developments Session 23 - Buses, networks & protocols - Part III

Speaker

Simone Vagaggini

Primary authors

Simone Vagaggini Daniele Davalle (IngeniArs S.r.l.) Roberto Ciardi (University of Pisa) Gionata Benelli (IngeniArs) Mr Emanuele Pagani (IngeniArs S.r.l.) Luca Fanucci (University of Pisa)

Presentation materials

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