Oct 2 – 6, 2023
ANTIPOLIS - Palais des Congrès d'Antibes
Europe/Amsterdam timezone

Topics

  • Satellite End-to-end Data Handling and Processing Architectures

    • On-Board Data Processing Architectures

      A1
    • On-Board Data Handling Architectures

      A2
    • ADHA - Advanced Data Handling Architecture

      A3
    • Reconfigurable Data System Architectures

      A4
    • Distributed Processing Architectures

      A5

      Distributed Computing of Data and Signal Processing

    • Signal Processing Chain Architecture

      A6
  • Reference Designs for Platform, Optical & RF Payloads Data Systems

    • On-Board Computer (OBC) Unit, Remote Terminal Unit, Mass Memory unit, Instrument Control Unit

      B1
    • High Performance Hardware Data and Signal Processing unit/module

      B2

      High Throughput Electronics for Payloads like Radar back-ends, Radiometer Back-ends, Telecom Processors, Payload Front End Electronics

    • Use of Digital and Mixed-signal Components in OBC / OBDP and in Data/Signal Processing Systems (Reference Designs)

      B3

      Multicore Processors, GPUs, FPGAs, DSPs, Memories, Full Custom Processor ICs,SoC, SiP, DAC, ADC

    • Use of COTS in OBC / OBDP and Signal Processing Systems

      B4

      Selection, Radiation Test Results, Mitigation Techniques in Designs, Software Defined Radios

    • Validation & Verification, Testing, Qualification, Simulation, Modelling of Complex Systems

      B5
  • Buses, Networks & Protocols

    • Protocol Developments

      C1

      SpaceWire, SpaceFibre, CAN-Bus, Ethernet, MIL-STD-1553, and Other Protocols

    • Validation & verification

      C2

      Simulation Suites, Test equipment, Approaches, and Standards

    • Components

      C3

      Embedded Interfaces in Processors/FPGAs, Switches, Routers, SerDes, (optical) Transceiver, Connectors, Harness

    • Wireless Technology

      C4
  • OBDP (On-Board Data and Signal Processing)

    • Device Benchmarks

      D1

      Multicore Processors, GPUs, FPGAs

    • Developments in On-Board Data Processing Frameworks, Architectures and Building Blocks

      D2

      Parallel Processing Frameworks (OpenMP, OpenCL), Hardware Acceleration of Processing Tasks, Heterogeneous Processing Systems, FPGA IP and HLS

    • On-Board Data Processing Algorithms and Implementations

      D3

      Multi- and Hyperspectral image Processing, Synthetic Aperture Radar (SAR) Processing, Radio Interferometer Processing, Visual Navigation, Data Reduction, Other On-Board Processing Applications

    • On-Board Signal Processing Algorithms and Implementations

      D4

      RF applications such as SDR, 5G/6G gNb, AIS, ADS-B, Beamforming, Modem, PNT, Positioning, SAR, DSP IP cores, FPGA IP (DSP cores, …) and HLS

    • AI and Machine Learning for On-Board Data Processing

      D5

      Data Analysis (classification, segmentation, selection), Datasets for Training of On-Board AI, Efficient Neural Networks, Software Tools and FPGA IP for Machine Learning Inference, Fault-tolerance in Deep Learning Algorithms, Applications for RF Payloads and Instruments, like Signal Intelligence, Anomaly Detection, Spectrum Allocation, Cognitive radar

    • Validation & Verification

      D6