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2–6 Oct 2023
ANTIPOLIS - Palais des Congrès d'Antibes
Europe/Amsterdam timezone

Session

EDHPC Tutorial: Artificial Intelligence workflows for FPGA & SoC using a Deep Learning Processor

2 Oct 2023, 14:00
Salle Sidney Bechet

Salle Sidney Bechet

Conveners

EDHPC Tutorial: Artificial Intelligence workflows for FPGA & SoC using a Deep Learning Processor: Part 1

  • Stephan van Beek (MathWorks)
  • Pierre Harouimi (MathWorks)
  • Laurent Hili (ESA)

EDHPC Tutorial: Artificial Intelligence workflows for FPGA & SoC using a Deep Learning Processor: Part 2

  • Stephan van Beek (MathWorks)
  • Pierre Harouimi (MathWorks)
  • Malte Bargholz (ESA)

Description

Introduction
Artificial intelligence (AI) is everywhere. The space industry is no exception. Automated recognition of lunar craters for moon landings and identification of space junk using imaging could play important roles in securing space safety and advancing space exploration. Deep Neural Networks (DNN) are the most successful solution for image-based object classification, and for most practical applications it requires performant platforms like FPGAs and SoCs.

Designing DNNs for embedded devices such as FPGAs and SoCs is challenging because of resource constraints, the complexity of programming in Verilog or VHDL, and the hardware expertise needed for prototyping on an FPGA or SoC.

Audience
Engineers who are developing AI algorithms and need to deploy on FPGA/SoC platforms
Level: both beginner and expert

What will you learn?
In this tutorial we will explain:
- Developing AI models using low code / no code workflows and interoperability with Python based frameworks (TensorFlow and PyTorch).
- Verifying and validating AI models.
- Prototyping and integrating Deep Learning-based vision applications using a Deep Learning Processor (DLP).
- Optimizing model performance on FPGA using compression methods like quantization and pruning.

Outline of hands-on tutorial
This tutorial explores developing a Deep Neural Network (DNN) algorithm leveraging FPGAs for space applications. It covers the deployment of DNN on FPGA platforms to accelerate tasks such as image analysis, object recognition, and data processing. Engineers at all skill levels can learn about optimizing, prototyping, and integrating DNN into FPGA-based systems, enabling efficient and high-performance space-related applications.

Speakers: Stephan van Beek and Pierre Harouimi from Mathworks

Presentation materials

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