Speaker
Description
In an era where technology underpins nearly every aspect of our lives, the importance of dependable hardware and software has never been more critical to ensure safety and security. The rapid pace of technological advancement often outstrips the ability to implement rigorous testing and validation processes, making it difficult to ensure that systems are both reliable and secure. At the Dependable Computing Systems group of the University of Twente, we employ a test-in-the-loop methodology for our dependability designing and research. The loop is depicted in Figure 1, and starts with a design, then bench tests, beam test and finally validation. We focus on the (co)design of dependable hardware and software frameworks. Examples include probabilistic instruction validators, a dependable execution environment, robust random forest tree algorithm, and runtime monitoring. In short, this includes software and hardware designs. These are first validated at the bench. Besides established simulation techniques, emulation based fault injection is extensively used. As well as side-channel analysis with custom tools. However, in the context of reliability evaluation, real beam experiments yield real results that allow us to create strong correlation with fault emulation techniques. Therefore, beam experiments are explicitly included in the methodology. Experiments are preformed on flash-based FPGAs and ASICs with neutrons and protons. The final step is validating the designs with the bench and beam experimental results. Key metrics are cross-sections and architectural and program vulnerability vectors. This validation serves as input for enhancement and refinement of the designs. The use of FPGAs is indispensable in this loop, as both bench and beam tests are primarily preformed with these devices. In summary, our focus on both theoretical and practical validation methods underscores the importance of dependability in technology, and aims to ensure that innovations are both effective and secure.
Affiliation of author(s)
University of Twente
| Track | Fault Tolerance Methodologies and Tools |
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