Speaker
Description
A common situation in hardware design for complex space systems is the need for simplification, driven by requirements related to weight, volume, power consumption, and cost. This often leads to resource limitations that pose significant challenges for designers.
Modern FPGAs can provide resources that help address these challenges through less traditional approaches. It is crucial for designers to have a comprehensive understanding of the toolbox that FPGA technology offers to explore alternative solutions when conventional methods are not applicable.
In this case study, a large number of ADCs needed to be properly connected to a central processing FPGA implemented on a PolarFire device. Due to hardware design constraints, the number of signals from the ADCs to the FPGA exceeded the available backplane connections. Additionally, challenges arose in meeting the mutual timing constraints of the routable interface signals.
The problem was resolved by combining system-level control with PolarFire features, leading to substantial external hardware simplification. The resulting solution meets all system requirements and has proven to be more robust than the originally intended architecture, both in minimizing points of failure and in its resilience to long-term variations, such as aging and signal drift.
Affiliation of author(s)
Thales Alenia Space
Track | Industrial experience |
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