15–17 Mar 2016
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
All available presentations have been posted

High Performance COTS based Computer with FPGA's implementation

16 Mar 2016, 14:50
25m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Speaker

Mr Olivier NOTEBAERT (Airbus Defence and Space)

Description

Architectural solutions for improving robustness of space computers w.r.t. radiations effects enables the development of high performance computers based on commercial grade digital processing devices such as microprocessors or FPGA's. This can bring a new range of space data processing performance at a reasonable cost. Indeed, several range of space applications require increasing bandwidth in data processing together with the flexibility or reprogrammable devices. However, conventional Rad-hard FPGA's provide limited performance and can only be configured once. Few rad-tolerant devices are now available but the capability to use commercial based FPGA's in space is a strong enabler. The ESA study HiP-CBC (High Performance COTS Based Computer) has validated the radiation mitigation concept with a TRL6 demonstrator. This concept is now applied to several applications, for instance with the Spartan 6 and should be extended in the future to other reprogrammable devices.

Summary

Architectural solutions for improving fault tolerance enables the use of commercial grade digital processing devices in space applications. The ESA study HiP-CBC (High Performance COTS Based Computer) has validated a radiation mitigation concept which can be applied for the development of high performance space computer design based on commercially available reconfigurable FPGA’s. Application examples will be presented.

Primary author

Mr Olivier NOTEBAERT (Airbus Defence and Space)

Presentation materials