Speakers
Mr
Dario Cozzi
(Univesity of Bielefeld)Mr
Sebastian Korf
(Bielefeld University)
Description
Reconfigurable systems are more and more employed in many application fields, including aerospace. SRAM-based FPGAs represent an extremely interesting hardware platform for this kind of systems, because they offer flexibility as well as processing power. Furthermore, the ability of run time reconfiguration of SRAM-based FPGAs can provide advantages for many applications. The scope of this project is to develop a software flow, named OLT(RE)² (On-Line Testing and Healing Permanent Radiation Effects in Reconfigurable Systems), for testing and diagnosing permanent faults in SRAM-based FPGAs during the life-time of a space mission. Once faults in the FPGA-fabric have been detected and located, the flow should enable patching the discovered faulty resources, allowing faulty regions of the FPGA to be available for further use during the space mission.
The OLT(RE)² flow enables to prove that the routing resources of an FPGA are free of stuck-at-1 and stuck-at-0 permanent faults (e.g., caused by TID). It is important to verify that the routing resources of the FPGA fabric are free of permanent faults, since they may cause stuck-at-0, stuck-at-1, bridge, conflicts or antenna effects in a specific design. OLT(RE)² relies on dedicated testing circuits handled by an integrated, custom place and route tool. Currently, these testing circuits allow testing slice associated routing resources.
Results regarding the fault coverage of the created testing circuits are presented for different FPGA families (Xilinx Virtex-4, Virtex-5, Virtex-6 and Spartan-6). The effectiveness of OLT(RE)² is proved on the DRPM (Dynamically Reconfigurable Processing Module) demonstrator, which allows validating the concept in a space application scenario. Stuck-at-1 and stuck-at-0 permanent faults are emulated on the DRPM in order to prove the fault detection capability of the tool. The hardware tests are performed on a Xilinx Virtex-4 FX100 FPGA of the DRPM, e.g., one clock region with 111,179 testable wires is diagnosed for permanent faults in around 26 seconds.
Primary authors
Mr
Dario Cozzi
(Univesity of Bielefeld)
Mr
Sebastian Korf
(Bielefeld University)
Co-authors
Dr
Andrea Domenici
(University of Pisa)
Dr
Cinzia Bernardeschi
(University of Pisa)
Mr
Jens Hagemeyer
(Bielefeld University)
Dr
Luca Cassano
(Dipartimento di Elettronica, Informatica e Bioingegneria - Politecnico di Milano)
Prof.
Luca Sterpone
(Politecnico di Torino)
Dr
Mario Porrmann
(Bielefeld University)
