Speaker
Mr
Olivier Lepape
(NanoXplore)
Description
NanoXplore will introduce the first member of its Radiation Tolerant NXT FPGA family. This device is the first SRAM based FPGA based on NanoXplore scalable patented architecture and entirely hardened by design in order to mitigate SEL, SEU and SEFI in the user application as well as in the configuration initialization and integrity. The combination of advanced hardening by design techniques with architectural features implemented in the configuration management lead to outstanding radiation robustness in line with space missions requirements.
The first part of the presentation will cover the FPGA hardware in term of user functionalities and characteristics (combinatorial logic, registers, memories, DSP functions, clock generation, clock distribution, I/O capabilities), radiation mitigation features (hard protections, soft protections), and configuration integrity mechanisms (bit stream download, bit stream integrity check, configuration check).
Then the second part will focus on the mapping software providing a full chain from RTL description to bit stream generation. By adopting dedicated algorithms developed specifically for NXT FPGA architecture, this software provides best in class mapping performances as well as very short execution times.
Summary
NanoXplore will introduce the first member of its Radiation Tolerant NXT FPGA family.
Primary author
Mr
Olivier Lepape
(NanoXplore)
