15–17 Mar 2016
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
All available presentations have been posted

Xilinx Virtex-5QV Update and Space Roadmap

17 Mar 2016, 10:00
1h 30m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Speaker

Mr Kangsen Huey (Xilinx, Inc.)

Description

Xilinx Space grade Field Programmable Gate Array (FPGA) has been utilized by the space community for over 15 years for payload applications requiring extensive amount of FPGA resources. The most current generation space grade FPGA is Virtex-5QV, which was introduced in 2011 which is well received by customers globally and has started to accumulate space flight heritage. This presentation will provide a quick status update on Virtex-5QV, then move on to the main topic to introduce Xilinx Space Roadmap, which will outline the next generation space grade FPGA from Xilinx. Many current and future requirements for space payload applications are demanding vast amounts of processing resources like logic cells, DSPs, SRAMs, and SERDES for digital data processing and image compressions, etc.; plus the in-orbit reconfigure-ability has now become essential to enable multi-use hardware for true reduction of SWaP (size, weight and power). These new requirements far exceeds the capability of Virtex-5QV and similar level devices, and can only be achieved with Xilinx next generation space grade FPGA. This presentation will provide an overview of the features and performance of Xilinx next generation space grade FPGA, initial radiation data, packaging plan, schedule for software, prototyping and space flight parts.

Primary author

Mr Kangsen Huey (Xilinx, Inc.)

Presentation materials