SEFUW: SpacE FPGA Users Workshop, 3rd Edition

from Tuesday, 15 March 2016 (09:30) to Thursday, 17 March 2016 (17:00)
European Space Research and Technology Centre (ESTEC) (Newton 1 and 2)

        : Sessions
    /     : Talks
        : Breaks
15 Mar 2016
16 Mar 2016
17 Mar 2016
AM
09:55 --- Registration and Early Morning Networking Break sponsored by CNES CCT and ESA's Data System Division ---
10:25 Welcome - Mr David Dangla (CNES) Mr David Merodio Codinachs (ESA)   (Newton 1 and 2)
Slides
10:50
Design Experiences -Mr David Merodio Codinachs (ESA) (until 12:35) (Newton 1 and 2)
10:50 Implementation of Space-Industry IP : A Comparison of Space-Grade FPGAs - Dr Rajan Bedi (Spacechips Ltd.)   (Newton 1 and 2)
Slides
11:20 FPGA development flow for future large space FPGA - Mr Florent MAnni (DC/TV/IN)   (Newton 1 and 2)
Slides
11:45 Prototyping a SOC on RTAX4000D for Solar Orbiter's Low Frequency Receiver. - Mr Alexis Jeandet (Plasma Physics Laboratory)   (Newton 1 and 2)
Slides
12:10 LEON3/GRLIB for Space-Grade Programmable Devices Update and Roadmap - Mr Jan Andersson (Cobham Gaisler AB)   (Newton 1 and 2)
Slides
08:50 SEFUW Intro - Opening Remarks - Mr David Dangla (CNES) Mr David Merodio Codinachs (ESA)   (Newton 1 and 2)
Slides
09:00
FPGA Vendors -Mr Agustin Fernandez-Leon (ESA) (until 10:30) (Newton 1 and 2)
09:00 Microsemi RTG4 FPGAs – Product Overview, Update on Radiation and Reliability Testing - Mr Ken O'Neill (Microsemi)   (Newton 1 and 2)
Slides
10:00 ATMEL AT40K RHBD FPGA last news - Mr Bernard BANCELIN (ATMEL Nantes S.A.S.)   (Newton 1 and 2)
Slides
10:30 --- Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division ---
11:00
FPGA Vendors -Mr Agustin Fernandez-Leon (ESA) (until 12:00) (Newton 1 and 2)
11:00 Common Subsystems Design Requirements for Performance and Reliability in an FPGA - Mr Ching Hu (Intel Corporation)   (Newton 1 and 2)
Slides
08:50 SEFUW Intro - Opening Remarks - Mr David Dangla (CNES) Mr David Merodio Codinachs (ESA)   (Newton 1 and 2)
Slides
09:00
FPGA Vendors -Mr David Dangla (CNES) (until 11:30) (Newton 1 and 2)
09:00 NanoXplore NXT-32000 FPGA - Mr Olivier Lepape (NanoXplore)   (Newton 1 and 2)
Slides
10:00 Xilinx Virtex-5QV Update and Space Roadmap - Mr Kangsen Huey (Xilinx, Inc.)   (Newton 1 and 2)
Slides
11:30 --- Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division ---
11:45
Radiation -Mr Christian POIVEY (ESA) (until 12:10) (Newton 1 and 2)
11:45 Heavy-Ion Micro Beam Study of Flash-Based FPGA Microcontroller Implementation - Mr Adrian Evans (IROC Technologies)   (Newton 1 and 2)
Slides
PM
12:35
Industrial Experiences -Mr David Merodio Codinachs (ESA) (until 13:00) (Newton 1 and 2)
12:35 Feedback on Xilinx Virtex-5QV FPGA - Mr Florian Seychal (THALES ALENIA SPACE FRANCE)   (Newton 1 and 2)
Slides
13:00 --- Networking Luncheon ---
14:20
FPGAs: High Performance -Mr David Merodio Codinachs (ESA) (until 14:45) (Newton 1 and 2)
14:20 SpaceWire and SpaceFibre on the Microsemi RTG4 FPGA - Mr Chris McClements (STAR-Dundee)   (Newton 1 and 2)
Slides
14:45
Fault Tolerance Methodologies and Tools -Mr David Dangla (CNES) (until 16:00) (Newton 1 and 2)
14:45 Configuration Scrubbing and Mitigation Approaches for the Zynq System-on-Chip - Mike Wirthlin (Brigham Young University)   (Newton 1 and 2)
Slides
15:10 SET effects analysis and mitigation on Flash-based FPGAs - Prof. Luca Sterpone (Politecnico di Torino)   (Newton 1 and 2)
Slides
15:35 FT-UNSHADES2: the User Friendly Framework as an interface for designer support - Dr Guzmán-Miranda Hipólito (Universidad de Sevilla)   (Newton 1 and 2)
Slides
16:00
Reconfigurability -Mr David Dangla (CNES) (until 16:25) (Newton 1 and 2)
16:00 Dyplo: software driven threaded FPGA development using partial reconfiguration techniques - Ms Inge Rutten (Topic Embedded Systems) Mr Dirk van den Heuvel (Topic Embedded Products)   (Newton 1 and 2)
Slides
16:25 --- Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division ---
16:55
Demo Session and Cocktail Reception sponsored by CNES CCT and ESA's Data System Division -Mr David Dangla (CNES) (until 18:55) (Newton 1 and 2)
12:00
Fault Tolerance Methodologies and Tools -Mr Agustin Fernandez-Leon (ESA) (until 12:35) (Newton 1 and 2)
12:00 The Benefits of Feedback TMR for SEU Tolerance of SRAM FPGA Designs - Mike Wirthlin (Brigham Young University)   (Newton 1 and 2)
Slides
12:35
Design Experiences -Mr Agustin Fernandez-Leon (until 13:00) (Newton 1 and 2)
12:35 Resource-Efficient Debugging Core to Evaluate FPGA Designs in On-Board Processors - Mr Florian Rittner (Friedrich-Alexander-Universität Erlangen-Nürnberg)   (Newton 1 and 2)
Slides
13:00 --- Networking Luncheon ---
14:00
Industrial Experiences -Mr Jelle Poupaert (ESA) (until 15:15) (Newton 1 and 2)
14:00 Experience gained in Flash-based FPGA for InSight - Mr Stephane Humbert (Syderal SA)   (Newton 1 and 2)
Slides
14:25 Spartan 6 Evaluation for Space Application - Tim Pike (Airbus DS)   (Newton 1 and 2)
Slides
14:50 High Performance COTS based Computer with FPGA's implementation - Mr Olivier NOTEBAERT (Airbus Defence and Space)   (Newton 1 and 2)
Transparents
15:15
FPGAs: High Performance -Mr Florent Manni (DC/TV/IN) (until 15:40) (Newton 1 and 2)
15:15 High-Performance Scientific Computing on FPGA aboard the Solar Orbiter PHI Instrument - Dr Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)   (Newton 1 and 2)
Slides
15:40 --- Networking Coffee Break sponsored by CNES CCT and ESA's Data System Division ---
16:10
FPGAs: High Performance -Mr Florent Manni (DC/TV/IN) (until 16:35) (Newton 1 and 2)
16:10 High Performance CCSDS Image Compression Implementations on Space-Grade SRAM FPGAs - Dr Nektarios Kranitis (Dept. of Informatics & Telecommunications, National and Kapodistrian University of Athens)   (Newton 1 and 2)
Slides
16:35
Fault Tolerance Methodologies and Tools -Mr Florent Manni (DC/TV/IN) (until 17:25) (Newton 1 and 2)
16:35 OLT(RE)²: A Tool Flow for Mitigation of Permanent Faults in Reconfigurable Systems - Mr Dario Cozzi (Univesity of Bielefeld) Mr Sebastian Korf (Bielefeld University)   (Newton 1 and 2)
Slides
17:00 Using Dynamic Circuit Specialisation to Enable Microreconfigurations for Space Applications - Mr Amit Kulkarni (Ghent University)   (Newton 1 and 2)
Slides
17:25 Wrap up and Open discussion - Mr David Dangla (CNES) Mr David Merodio Codinachs (ESA)   (Newton 1 and 2)
20:00 --- SEFUW Dinner ---
12:10
FPGAs: High Performance -Mr David Merodio Codinachs (ESA) (until 13:00) (Newton 1 and 2)
12:10 FPGA acceleration in GMV projects for Space Vision-based GNC systems - Mr David Gonzalez-Arjona (GMV Aerospace and Defence)   (Newton 1 and 2)
Slides
12:35 FPGA acceleration of computer vision and optimization for European space applications - Dr George Lentaris (National Technical University of Athens, Greece)   (Newton 1 and 2)
Slides
13:00 --- Networking Luncheon ---
14:00
Reconfigurability -Mr David Merodio Codinachs (ESA) (until 14:25) (Newton 1 and 2)
14:00 Fast In-Orbit FPGA Reconfiguration via In-Band TM/TC - Mr Christopher Stender (Fraunhofer Institute for Integrated Circuits IIS)   (Newton 1 and 2)
Slides
14:25
Radiation -Mr Christian POIVEY (ESA) (until 15:15) (Newton 1 and 2)
14:25 Single Event Effect Test on 28nm FPGA - Dr Pierre Garcia (TRAD)   (Newton 1 and 2)
Slides
14:50 An overview of FPGA use in the LHC accelerator and the CERN experiments - Mr Salvatore Danzeca (CERN)   (Newton 1 and 2)
Slides
15:15
Fault Tolerance Methodologies and Tools -Mr David Merodio Codinachs (ESA) (until 16:05) (Newton 1 and 2)
15:15 Enhancing the Reliability of COTS SRAM-based FPGAs with Microreconfiguration for SEU Mitigation in Space Applications - Ms Alexandra Kourfali (Ghent University / ESA)   (Newton 1 and 2)
Slides
15:40 Highly Reliable System-on-Chip using Dynamically Reconfigurable FPGAs - Prof. Luca Sterpone (Politecnico di Torino)   (Newton 1 and 2)
Slides
16:05 Concluding remarks and closure - Mr David Dangla (CNES) Mr David Merodio Codinachs (ESA)   (Newton 1 and 2)