Speakers
Mr
Luca Fossati
(ESA/Data Systems Division)Mr
Roland Trautner
(ESA/Data Systems Division)
Description
Future GNC systems feature increasingly complex functionality, requiring fast and efficient processing units and equally efficient interconnection to feed them with high rate sensor data. For what concerns the former point, ESA is working on complementary architectures spanning from a multi-core general purpose microprocessor (NGMP) to more specialised devices. This is complemented by the development of very high speed interfaces and links able to cope with multi-Gbps level data transfers.
The Next Generation MicroProcessor (NGMP) is a quad-core system-on-chip including four LEON4 SPARC32 cores with dedicated L1 caches and a shared L2 cache. It includes a DDR-type main memory interface and various high-performance I/O interfaces. Currently the architectural design is complete and has been manufactured in a commercial prototyping ASIC technology. Implementation of the NGMP as a space component is planned to start in 2014 and this in a suitable advanced Deep-Sub-Micron technology.
As far as specialised devices are concerned, the Control Loop Processor features two parallel processing chains enabling fully deterministic control of electromechanical systems, and this at high control loop frequencies. One distinctive feature is the usage of IEEE-754 compliant floating point arithmetic, a common representation to simulators and end flight code. Additionally, the device will be completed with a software development environment capable to generate executable code from a mathematical model. In the same category, it is worth mentioning ESA's push and efforts focusing on the development of a European source for next generation Digital Signal Processor (DSP) and high gate number FPGAs.
Finally the evolution of SpaceWire for higher data throughput communication channels (SpaceFibre) will be presented.
