25–27 Feb 2019
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone

Fast Fourier Transform at 100 Msamples/sec with the SkyFFT ASIC

27 Feb 2019, 12:10
20m
Erasmus (European Space Research and Technology Centre (ESTEC))

Erasmus

European Space Research and Technology Centre (ESTEC)

ESTEC (European Space Research & Technology Centre) Keplerlaan 1 2201 AZ Noordwijk The Netherlands Tel: +31 (0)71 565 6565
Oral presentation Devices and IP for On-Board Data Processing Devices and IP for On-Board Data Processing

Speaker

Bert-Johan Vollmuller (NLR)

Description

For a long time, FFT-processing was avoided in on-board processing, due to the heavy load on general purpose processors. Nowadays there are several FFT IP-cores available for eg the Virtex-5 Xilinx FPGA or independant FFT IP-cores, but most of them have lack of accuracy or have a limited FFT-size.

ESA developed, in co-operation with Astrium D&S and Atmel the SkyFFT ASIC: a FFT-processing core, in radhard technology that is capable of FFT processing at 100 Mega-samples per second (32 bits I and 32 bits Q input samples in parallel), which is available since 2015.

Today an EM-model have become available that shows all capabilities (and modes) of the SkyFFT at full speed performance and is ready for demonstration. The EM-model consist of an RTG4 FPGA for the control, SpaceWire for command interface and two SpaceFibre data interfaces.

On-board FFT processing is therefore now available for selection in missions.

Paper submission Yes

Primary author

Bert-Johan Vollmuller (NLR)

Presentation materials