Speaker
Mr
Ottmar Ried
(Airbus Defence & Space GmbH)
Description
Since years Airbus Defence and Space capitalizes on the advantages of Field Programmable Gate Array Technologies and has accumulated considerable heritage and experiences with it. This presentation provides with an overview of the application domains and the FPGA devices that address those application fields. That extends from the well-established Microsemi anti fuse FPGAs (RTSX/RTAX) to more recent and flexible reprogrammable devices (PA3, RTG4, SPARTAN-6, VIRTEX-4/5, BRAVE). Particular consideration will be payed towards the experiences associated with the European BRAVE medium FPGA. Application domains and benefits will be discussed. As all recent technologies augment significantly in complexity, in resources and functionality, new scopes and opportunities will be discussed. Regardless the technology, all recent devices have a significant rise in complexity in common. This changes also the application of the FPGAs from a dedicated function solution to a complex system on chip (SoC) with influences on the total development approach.
From user point of view, the equipment complexity is inside the FPGA which integrates a large part of numeric hardware, data handling software and application software. The FPGA specification is more a system specification and is distributed in several module specifications with clear interfaces in order decreasing the complexity . So it is necessary to have a strong interaction between the system engineer who has the responsibility of the system behavior, the FPGA team and the software team.
The information described in a specification is not sufficient anymore in a complex system, an executable specification which describes the functionality and can be used as a golden reference may be an answer but also the participation of the system engineer to the FPGA co-design phase should be required.
In fact, fast loop co-engineering phase is necessary during the major part of the design phase to resolve the equipment complexity. From user point of view , the fast exchanges during co-design allow to make the trade-offs on various subjects such as power, timings, data accuracy, functional behavior, resources utilization. From equipment designer point of view, a potential drawback is that the design is more showed up even if the design is less risked.
Finally our experiences with Mentor Vista will show an example of a tool supporting a SoC design approach.
Primary author
Mr
Ottmar Ried
(Airbus Defence & Space GmbH)
Co-author
Mr
Christian Boleat
(AIRBUS)
