ESA Workshop on Avionics, Data, Control and Software Systems - ADCSS 2007

Session

Next Generation Processor for On-Board Payload Data Processing Applications

5 Oct 2007, 09:00

Newton Conference Center (ESA/ESTEC)

Presentation materials

Abstracts

Next_Generation_Processor_0510.zip

80. RadSafe ASSP

R. Ginosar (Ramon Chips Ltd)

05/10/2007, 09:00

81. Space Fibre

S. Parkes (University of Dundee)

05/10/2007, 09:25

82. Deep Submicron AIC Platform Approach for Next Satellite Telecom Processors - Possible Application to Other Processors

N. Renaud (Atmel)

05/10/2007, 09:50

83. High Perf. ASIC Platform Approach for Next Satellite Telecom Processors - Possible Appliction to Other Processors

L. Dugoujon, et al. (ST Microelectronics)

05/10/2007, 10:15

84. Round Table Discussion

Mr Martin Suess (ESA/ESTEC)

05/10/2007, 10:40

85. Dynamically Reconfigurable Processor for Space Application

E. Schueler (PACT XPP Technologies)

05/10/2007, 11:10

86. A Montium Based Dynamically Reconfigurable Multi-Core for High Performance DSP Applications

PM Heysters, et al (Recore Systems)

05/10/2007, 11:35

87. A Dynamically Reconfigurable Processor Architecture for Future Space Missions' Payload Data Processing

T Arslan, et al. (The University of Edinburgh)

05/10/2007, 12:00

88. A High-performance, Low-power, Flexible Platform for Next generation On-Board Payload Data Processing Application

T Beese (Clear Speed)

05/10/2007, 12:25

89. Payload Processing Based on LEON3FT SMP Architecture

J. Gaisler (Gaisler Research)

05/10/2007, 12:50

90. Roadmap for NG Processor for Payload Applications - Discussion and Conclusion

Mr Martin Suess (ESA/ESTEC), Mr Philippe Armbruster (ESA/Data Systems Division)

05/10/2007, 14:15