Conveners
Session 2: Test, Verification and Qualification of DSP Chips
- Boris Glass (ESA)
Mr
Fernando Martinez
(ESA)
15/06/2016, 16:00
DSP Day: Test, Verification and Qualification of DSP chips
The European Space Components Coordination (ESCC) system has been developed exclusively to support the procurement and space qualification of EEE Components. It is a unique system in that the requirements are not only dictated by end-users, agencies or industry, but are compiled and agreed by manufacturers, component users and qualifying agencies working together in a shared standardization...
Mr
Ricardo Pinto
(Thales Alenia Space)
15/06/2016, 16:30
DSP Day: Test, Verification and Qualification of DSP chips
SSDP Architecture
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The Scalable Sensor Data Processor (SSDP) is a heterogeneous multicore architecture for high-performance on-board data processing. Broadly, it embeds a Control block based on the well-known Cobham Gaisler LEON3 System-on-a-Chip (SoC) [1], with a LEON3FT general-purpose processor connected to several I/O interfaces via AMBA bus. The Processing block is...
