Speaker
Mr
Amit Kulkarni
(Ghent University)
Description
Dynamic Circuit Specialisation (DCS) allows an FPGA design to be dynamically specialized for a subset of its infrequently changing inputs (parameters). Instead of implementing these parameter inputs as regular inputs, in the DCS approach these inputs are implemented as constants and the design is optimized for these constants. When the parameter values change, the design is re-optimized for the new constant values by reconfiguring the FPGA. This is done via micro-reconfiguration where we replace stale bits with specialized bits. The configuration for the parameterized design is generated off-line through an adapted FPGA tool flow. In the adapted tool flow, the bitstreams (entries of the truth tables) are expressed as the Boolean functions of the parameter inputs. At the run-time, for every infrequent change in parameter value, these Boolean functions are evaluated for a specific parameter value to generate specialized bitstreams.
In this demo we will show, how we can use DCS to reconfigure FPGAs in space applications. With DCS we create an intermediate generic bitstream that can be later evaluated to its specialized version, for the given parameters. However, this generic bitstream results to functionally equivalent specialized configuration resulting from the evaluation of a boolean function. Thus, there is no need of qualifications of the new design. Moreover, we can therefore transmit when needed only the trigger for the evaluation of the Boolean function and not the entire bitstream, making the reconfiguration faster and the transmission safer.
Primary author
Mr
Amit Kulkarni
(Ghent University)
Co-authors
Ms
Alexandra Kourfali
(Ghent University / ESA)
Prof.
Dirk Stroobandt
(Ghent University)
