AMICSA 2018

SIS20: A CMOS ASIC for Solar Irradiance Sensors in Mars Surface

19 Jun 2018, 10:00

25m

Oral Space applications for analogue and mixed-signal ICs Space Applications

Speaker

Prof. Vázquez Diego (IMSE-CNM-CSIC/University of Seville)

Description

This paper reports the design and characterization of the ASIC SIS20, planned for an instrument aimed to measure Solar Irradiance on the surface of Mars. It has been designed using the AMS0.35u CMOS technology and with the rad-hard digital library developed at IMSE (Spain). The ASIC is intended for flying with the ExoMars2020 mission. The design was taped out in June2017. Samples are packaged in a 68 pins module. Nowadays, a complete functional testing in the specified range of temperature (-125º C to 50º C) has been carried out for several samples. Figure 3 shows the PCB Test Board. Results are in accordance with the specifications. At this moment, the chips are under the qualification process. Of course, if accepted, the final paper would summarize the results from the lab.

Summary

The main functionality of ASIC-SIS20 is twofold: read (analog) and convert (to digital) the photocurrents generated by a set of off-chip photo-diodes. However, it has been designed to perform additional functions of interest.

The ASIC is mainly composed of four major blocks:

An Analog Front-End comprising:
10 identical photodiode trans-impedance amplifiers (TIAs) or reading channels with two external (switched) feedback networks (low/high gain modes) per channel.
4 PT1000 conditioning and measuring pins for temperature measurements.
A current-output DAC to drive an off-chip LED as a light source for calibration and monitoring purposes.
3 general purpose voltage amplifiers, with configurable gain (1/50).
Internal voltage (bandgap based) and current reference circuits.
Miscellaneous pins and multiplexers (GATOs) for testing and characterization purposes.

A 16-Bits ADC channel preceded by an extended input multiplexed and capacitive input impedance instrumentation amplifier with configurable gain (1/ 50).

A 10-bits DAC used to generate reference voltages for internal signal ranges accommodation.

A digital circuitry comprising:
Digital signal processing blocks.
A disable 100Kbits/sec slave SPI interface for configuration and data transmission.
A bank of registers for ASIC configuration, control and data I/O transmissions.
A Power-on-reset (POR) circuitry.
CLK signal generator.

Presentation materials

Slides

Presentacion_Amicsa2018.pptx