Speaker
Dr
Antonios Tavoularis
(European Space Agency)
Description
The higher performance requirements of the upcoming space missions and the availability of highly integrated processing solutions, such as the Xilinx all-programmable SoC, calls for an increase in the use of COTS devices and software-defined applications. SEE characterization of these devices is at the same time a necessity and a challenge, because they present difficulties that are either not fully addressed by current testing guidelines, or may result in expensive, cumbersome test configurations. Thanks to a cooperation agreement between CERN and ESA, certain ESA projects were offered beam time from the most intense beam of ultra-high energy ions available at the Super Proton Synchrotron (SPS) particle accelerator.
We present hereby the results of several radiation tests performed under the aforementioned beam on two different devices: COTS Flash FPGA from Microsemi (AP3000L-1PQG208 ProASIC3) programmed with a rad-hard soft controller; and a COTS all-programmable SoC from Xilinx (Zynq 7020) that embeds an SRAM FPGA (XC7020-CLG484) and two ARM Cortex9 processors, hosted on a Zedboard.
In order to test the Microsemi ProASIC3, the PicoSkyFT soft-core, integrated into a SoC configuration with peripherals, is used for characterization. The PicoSkyFT SoC netlist is additionally hardened by a proprietary tool, which automatically applies TMR with selectable levels of triplication. A custom single-threaded firmware is used for testing, with emulated operations such as data shuffling, arithmetic operations and operations with peripheral units, sequenced in an infinite loop. The PicoSkyFT is able to differentiate between recoverable and non-recoverable EDAC errors, invalid and privileged instructions, invalid access program and data memory, invalid register file parity faults.
For testing the Xilinx Zynq, two boards are used with different applications. The first one consists of a basic design that reports results from the Coremark software running in the ARM processor. Additionally, a script is used to periodically readback the configuration memory and count the configuration errors. The second mechanism focused on evaluation the programmable logic of the Zynq, by means of a high-performance VHDL benchmark based on FIR modules of varying size. This VHDL design involves parallel architectures with parametrizable number of filter taps, which can be combined to create big implementations, covering and monitoring the majority of the configurable logic blocks (CLBs). This benchmark allows for the localization of the SEE occurring by the ion hit. The processing system on the Zynq controls the filters operation and detects the errors.
SEFI occurrence and SEE cross-section is extracted for both the ProASIC3 and the Zynq, contributing to demonstrate that heavy Ion irradiation with CERN’s SPS Ultra High Energy source could represent in the future a viable solution for screening of components to be used in space applications.
Primary authors
Dr
Antonios Tavoularis
(European Space Agency)
Mr
Dejan Gacnik
(SkyLabs d.o.o.)
Dr
George Lentaris
(National Technical University of Athens, Greece)
Mr
Gianluca Furano
(ESA/Data Systems Division)
Mr
Konstantinos Maragos
(National Technical University of Athens)
Dr
Lucana Santos
(European Space Agency)
