9–11 Apr 2018
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
PLEASE READ ME: public presentations (made available by the presenters) posted on website - for the presentations not available and/or password protected, a public version was not made available by the presenters.

First Design-In Experiences of Xilinx's, 20 nm, Kintex UltraScale KU060 for Space Applications and 16 nm UltraScale+ RFSoC for Ground Segment

10 Apr 2018, 10:00
20m
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands

Speaker

Dr Rajan Bedi (Spacechips Ltd)

Description

We compare and share design-in experiences of Xilinx's, 20 nm, Kintex UltraScale KU060 for space applications. This FPGA offers 726k LUTs and 32, 12.5 Gbps high-speed serial links, offering the potential to enable the next generation of real-time, high-throughput payloads. The KU060 can instantiate Xilinx's, TMR, MicroBlaze 32-bit RISC MPU for fault-tolerant applications as well as Vivado's IP Integrator to automate the creation of TMR designs. To complement the KU060, we also discuss and share design-in experiences of Xilinx's, new 16 nm UltraScale+ RFSoC device. This part integrates wideband GSPS ADCs and DACs capable of directly processing RF frequencies, offering huge potential to miniaturise the next generation of ground-segment satellite transceivers.

Primary author

Dr Rajan Bedi (Spacechips Ltd)

Presentation materials