Nov 12 – 16, 2018
ESA/ESTEC
Europe/Amsterdam timezone

Accurate Abstraction and High Level Modeling and Validation of SEE in Electronic Systems

Nov 13, 2018, 2:30 PM
1h
Newton 1-2 (ESA/ESTEC)

Newton 1-2

ESA/ESTEC

Keplerlaan 1, 2200 AG Noordwijk The Netherlands
Tests and simulations Tests and simulations

Speaker

Dr Otmane Ait Mohamed (University Concordia)

Description

In this talk, we will be discussed the practical use of formal based techniques, such as SAT, SMT and probabilistic model checker to analyze SEEs at logical and higher abstraction levels. Through examples, we will illustrate each approach and its benefits.

Primary author

Dr Otmane Ait Mohamed (University Concordia)

Presentation materials