SERESSA International School 12-16 Nov. 2018

12 Nov 2018, 08:00 → 16 Nov 2018, 18:00 Europe/Amsterdam

Newton 1-2 (ESA/ESTEC)

Raoul Velazco (Université Grenoble-Alpes / TIMA), Veronique Ferlet-Cavrois (ESA), Gregoire Deprez (ESA), Jaime Estela (Spectrum ARC GmbH), Petteri Nieminen (ESA)

14th international School on the Effects of Radiation on Embedded Systems for Space Applications

                 

This five-day school SERESSA combines academic, government, and industrial communities working in the area of radiation effects on embedded systems. Radiation effects are a significant concern for space and avionics systems, as well as for critical applications operating at ground level such as automotive, medical or even banking.

During these five days, lecturers with significant experience in key selected subjects will provide a complete state-of-the-art instruction in this strategic field. The school is based on lectures, exercises, and practical courses involving real case studies using the common tools of the domain.

The topics addressed cover the full spectrum of radiation effects on space-embedded systems: space environment, error mechanisms, testing, hardening by design, rate prediction. The intended audience includes both beginning and experienced researchers, engineers, and post-graduate students wishing to enhance their knowledge base in this rapidly evolving field. 

Topics

Topics covered by SERESSA include:

• radiation environment
• spacecraft anomalies
• single-event effects (SEE)
• total dose effects (TID)
• radiation effects in power systems
• radiation effects in solar cells
• architecture hardening in analog and digital circuits and in memories
• software hardening
• effects in FPGAs
• hardness assurance
• rate prediction
• radiation testing
• laser testing 
• remote testing experiments

Posters

• Modeling of SET Generation in Standard CMOS Logic Gates - Marko Andjelkovic
• On membrane PD SOI MOSFET versus Eldo and Atlas simulations - Sedki Amor
• SEU and spectroscopic measurements using novel - Anezka Kabatova
• SEU screening using an Am-Be neutron source - Matteo Cecchetto
• Simulating radiation effects of imaging detectors using Pyxel simulation framework - David Lucsanyi
• Single Event Effect Tester for SmartFusion2 FPGAs - Jan Zich
• The SpacePix radiation monitor - Matej Vaculciak
• Three irradiation facilities from CNA and coming upgrade - Pedro Martin-Holgdo

Presentations

• 00 - Introduction - Raoul Velazco
• 00 - Program - Gregoire Deprez
• 01 - Space Environments - Hugh Evans
• 02 - TID and TNID - Christian Poivey
• 03 - Single events effects mechanisms - Stephen Buchner
• 04 - SEE test methods - Konstantin Tapero
• 05 - SEE effects on VLSI devices - Luca Sterpone
• 06 - EEE parts New Space Paradigm - Ken LaBel
• 07 - Radiation Hardness Assurance - Stephen Buchner
• 08 - System Hardening and Real Applications - Michel Pignol
• 09 - High level modeling - Otmane Ait Mohamed
• 10 - Fault Injection Methodologies - Luis Entrena
• 11 - SEU rate prediction - Raoul Velazco
• 12 - ASIC FPGA Handbook - Agustin Fernandez-Leon
• 13 - FPGA Mitigation Strategies - Melanie Berg
• 14 - Hardened Cell Library - Joao Batista dos Santos
• 15 - Microprocessor Testing - Heather Quinn
• 16 - Many core processors fault tolerance - Ramos & Vargas
• 17 - Radiation tests SRAM memories - Juan Clemente
• 18 - Laser SEE testing - Dale McMorrow
• 19 - Automotive safety challenges - Sung Chung
• 20 - Error correction embedded memories - Fakhreddine Ghaffari
• 21 - Effects of radiations on solar cells - Jose Ramon-Gonzales
• 22 - Co60 training Presentation 2 - Jaime Estela
• 22 - Co60 training TID test execution - Michele Muschitiello & Alessandra Costantino
• 23 - Atmospheric Radiation - Frederic Wrobel
• 24 - CNES and COTS in Space - Michel Pignol
• 25 - COTS in space - Jaime Estela
• 26 - COTS on ground UHE radiation test - Ruben Garcia Alia
• 27 - ESA approach COTS - Karin Lundmark
• 28 - Conclusion - Velazco and Deprez

Videos

• 00 - Introduction - Velazco & Deprez
• 01 - Space environment - Hugh Evans
• 02 - TID and TNID - Christian Poivey
• 03 - Single events effects mechanisms - Stephen Buchner
• 04 - SEE test methods - Konstantin Tapero
• 05 - SEE effects on VLSI devices - Luca Sterpone
• 06 - EEE parts New Space Paradigm - Ken LaBel
• 07 - Radiation Hardness Assurance - Stephen Buchner
• 08 - System Hardening and Real Applications - Michel Pignol
• 09 - High Level Modeling and Validation of SEE - Otmane Ait Mohamed
• 10 - Fault Injection Methodologies - Luis Entrena
• 11 - SEU rate prediction - Raoul Velazco
• 12 - ASIC FPGA Handbook - Agustin Fernandez-Leon
• 13 - FPGA Mitigation Strategies - Melanie Berg
• 14 - Hardened Cell Library - Joao Batista dos Santos
• 15 - Microprocessor Testing - Heather Quinn
• 16 - Many core processors fault tolerance - Ramos & Vargas
• 17 - Radiation tests SRAM memories - Juan Clemente
• 18 - Laser SEE testing - Dale McMorrow
• 19 - Automotive safety challenges - Sung Chung
• 20 - Error correction embedded memories - Fakhreddine Ghaffari
• 21 - Effects of radiations on solar cells - Jose Ramon-Gonzales
• 23 - Atmospheric Radiation - Frederic Wrobel
• 24 - CNES and COTS in Space - Michel Pignol
• 25 - COTS in space - Jaime Estela
• 26 - COTS on ground UHE radiation test - Ruben Garcia Alia
• 27 - ESA approach COTS - Karin Lundmark
• 28 - Conclusion - Velazco & Deprez

Monday 12 November

09:00 → 11:00 Organization

09:00 Opening speeches and program overview

Speakers: Dr Raoul Velazco (Université Grenoble - TIMA), Dr Gregoire Deprez (ESA)

Presentation history

Presentation program

Video

10:30 Coffee and posters

Measurements using novel monolithic pixel radiation detectors - Anezka Kabatova

Modeling of SET Generation in Standard CMOS Logic Gates - Marko Andjelkovic

On-membrane PD SOI MOSFET with micro-heater for TID in-situ annealing: experiments versus Eldo and Atlas simulations - Sedki Amor

Recent studies at the three irradiation facilities from the CNA and the coming upgrade - Pedro Martin-Holgdo

SEU screening using an Am-Be neutron source - Matteo Cecchetto

Simulating radiation effects imaging detectors Pyxel - David Lucsanyi

Single Event Effect Tester for SmartFusion2 FPGAs - Jan Zich

The SpacePix radiation monitor - Matej Vaculciak

09:30 → 10:30 Space and atmospheric environments

09:30 Space Environments

This talk presents the various radiation environments encountered by any spacecraft wandering in space, from LEO to interplanetary. For each of these environments, the potentially harmful phenomena - mainly trapped radiation, galactic cosmic rays and solar particle events - are presented as well as their degrading effects on spacecraft electronic systems.

Speaker: Mr Hugh Evans (ESA/TEC-EPS)

Presentation

Video

11:00 → 17:00 Radiation effects (SEE, TID, TNID)

11:00 TID and TNID

Speaker: Mr Christian POIVEY (ESA)

Presentation

Video

12:15 Single Event Effects (SEE): Mechanisms and Classifications

The fundamental mechanisms responsible for non-destructive and destructive
Single-Event Effects in ICs will be described in detail. This will include the
interactions of ions with the constituent materials of the IC, the response of
individual transistors to the disturbance, and the effect on the operation of the
IC. The evolution of the threat with device scaling will be addressed.

Speaker: Dr Stephen Buchner (United States Naval Research Laboratory)

Presentation

Video

14:30 Single Event Effects Test Methods

The lecture presents an overview of main types of single event effects (SEE), basic characteristics of sensitivity of devices and integrated circuits to SEE and existing standards and guidelines for testing with the use of heavy ion and proton accelerators. Basic requirements for both heavy ion and proton testing will be considered in detail including requirements for the energy of ions, their linear energy transfer (LET) and the range in semiconductor, recommendations for choosing the flux and fluency of ions, requirements for beam control during testing. Also, the lecture gives information about the specifics of testing for different types of SEE, such as: an impact of temperature and electrical bias conditions on the test results; recommendations for choosing test patterns during testing; advantages and disadvantages of static and dynamic testing; an impact of total ionizing dose effects on test results; specifics of testing for destructive types of SEEs and others. In addition, the lecture presents some recommendations for choosing the SEE test algorithms depending on the purpose and required result of testing.

Speaker: Dr Konstantin Tapero

Presentation

Video

16:00 SEE effects on VLSI devices (ASIC and FPGA)

Radiation effects on VLSI technology are provoked when radiation particles such as neutrons, protons or heavy ions hit a sensitive region of the integrated circuits. Due to the progressive technology scaling, VLSI devices are becoming, more and more vulnerable to Single Event Effects (SEEs) and are subject to cumulative ionizing damage known as Total Ionization Dose (TID). This talk will firstly describe the state-of-the-art methodologies used for analysing the impact of radiation effects on modern FPGAs and ASICs by means of Computer Aided Design (CAD) tools and secondly, it will describe the state-of-the-art CAD design techniques for their mitigation.

Speaker: Prof. Luca Sterpone (Politecnico di Torino)

Presentation

Video

13:15 → 14:30 Lunch

15:30 → 16:00 Coffee and posters

17:00 → 18:00 Mitigation and Hardening

17:00 EEE Parts in the New Space Paradigm

As the space business rapidly evolves to accommodate a lower cost model of development and operation via concepts such as commercial space and small spacecraft (aka, CubeSats and swarms), traditional EEE parts screening and qualification methods are being scrutinized under a risk reward trade space. In this presentation, two basic concepts will be discussed: The movement from complete risk aversion EEE parts methods to managing and/or accepting risk
via alternate approaches; and discussion of emerging assurance methods to reduce overdesign as well emerging model based mission assurance (MBMA) concepts. Example scenarios will be described as well as consideration for trading traditional versus alternate methods.

Speaker: Mr Kenneth LaBel (NASA-GSFC)

Presentation

Video

18:00 → 18:30 End of the day discussions

Tuesday 13 November

09:00 → 09:30 Registration

09:30 → 13:00 Mitigation and Hardening

09:30 Radiation Effects Hardness Assurance for space mission

The approach used to ensure that parts will meet performance requirements for a mission operating in a radiation environment will be discussed. First part
will mostly focus on Single Event Effect Hardness Assurance. A particular mission will be used to illustrate the method. Second part will develop total ionizing dose (TID) and displacement damage (DD) hardness assurance.
Rationale for defining Radiation Design Margin (RDM) requirements will be presented. Systematic errors and uncertainties on the different inputs needed to define the TID and DD RDM will be discussed.

Speaker: Dr Stephen Buchner (United States Naval Research Laboratory)

Presentation

Video

11:00 System Hardening and Real Applications

This talk describes the suitable protections at architecture and system level against the effects of radiation on electronic components and digital systems. After the description of the general architecture of a space avionics system, the potential solutions for each type of units constituting an on-board computer are presented through the example of real space applications: avionics bus, links, memory units, and – the main part – processing units i.e. fault-tolerant architectures. The main fault-tolerant mechanisms are overviewed, as time replication either at instruction or task level, duplex, triplex (TMR), lock-step, and a trade-off between these different solutions. Then, real case studies are analyzed.

Speaker: Mr Michel Pignol (CNES)

Presentation

Video

10:30 → 11:00 Coffee and posters

13:00 → 14:30 Lunch

14:30 → 18:00 Tests and simulations

14:30 Accurate Abstraction and High Level Modeling and Validation of SEE in Electronic Systems

In this talk, we will be discussed the practical use of formal based techniques, such as SAT, SMT and probabilistic model checker to analyze SEEs at logical and higher abstraction levels. Through examples, we will illustrate each approach and its benefits.

Speaker: Dr Otmane Ait Mohamed (University Concordia)

Presentation

Video

15:30 Fault Injection Methodologies

Fault injection is a widely used method to evaluate fault effects and error mitigation in a design. While not a replacement for standard Radiation- Hardness Assurance methodologies, it can provide valuable information in a quick and inexpensive manner. Moreover, recent developments have improved performance by several orders of magnitude, thus enabling the realization of extremely large fault injection campaigns. Today, fault injection can be used to forecast the expected circuit behaviour in the occurrence of SEUs and SETs, validate error mitigation approaches and detect weak areas that require error mitigation. This talk will review the most relevant fault injection methods, covering software-based techniques, simulation techniques and FPGA-based emulation techniques. Recent advances for SET and MCU emulation will also be presented.

Speaker: Prof. Luis Entrena Arrontes (Universidad Carlos III Madrid)

Presentation

Video

17:00 Error-rate Prediction for Programmable Circuits: Methodology, Tools and Studied Cases

This presentation describes a method devoted to SEU error-rate prediction for processor-based architectures. The proposed method combines results issued from fault-injection, performed at circuit by means of CEU (Code Emulated Upsets), to those issued from radiation ground tests. It allows predicting error rates without requiring radiation ground-tests for future applications. The approach was successfully applied to processors and FPGAs and is illustrated by three representative case-studies.

Speaker: Dr Raoul Velazco (Laboratoire TIMA)

Presentation

Video

16:30 → 17:00 Coffee and posters

18:00 → 18:30 End of the days discussions

Wednesday 14 November

09:00 → 09:30 Registration

09:30 → 13:00 Mitigation and Hardening

09:30 Mitigation in ASICs and FPGAs

Speaker: Mr Agustin Fernandez-Leon (ESA/ESTEC)

Presentation

Video

11:00 New Developments in FPGA: SEUs and Fail-Safe Strategies

Technology is changing at a fast pace. Transistor geometries are getting smaller, voltage thresholds are getting lower, design complexity is exponentially increasing, and user options are expanding. Consequently, reliable insertion of error detection and correction (EDAC) circuitry has become relatively challenging. As a response, a variety of mitigation techniques are being implemented. They range from weaker EDAC circuits that save area and power to strong mitigation strategies that come as a great expense to the system. Regarding FPGA and ASIC EDAC insertion, there is no “one-solution-fits-all.” The user must be aware of plethora of concerns. As an example, each FPGA device-type requires a different mitigation strategy for various reasons. This presentation will focus on the susceptibilities of a variety of FPGA types and ASICs in the avionics and space environment. In addition, the user will be provided information on what are the optimal mitigation strategies per FPGA and ASIC. Internal device component mitigation versus system level mitigation will also be discussed.

Speaker: Mrs Melanie Berg (NASA - GSFC)

Presentation

Video

12:00 Development of a Hardened 150nm Standard Cell library

The effects produced by radiation on integrated circuits can be classified into Single Event Effects (SEE) related to transient problems and Total Ionization Dose (TID) effects that arise due to the long exposure time ionizing radiation. The mitigation of these effects on integrated circuits can be done in three ways: Manufacturing Process Level, Architectural Level (redundancy) and Layout Level. The work presented here deals with the third way of mitigation, that is, the cell library design of radiation tolerant integrated circuits. Designed and manufactured in silicon on 150nm technology, the SMDH-RH library is based on the use of guard rings and the application of closed geometry techniques (ELT – Enclosed Layout Transistor). The library includes simple and complex digital logic gates. It was tested in space as payload of a nanosatellite (NanosatC-Br1), launched in space in 2014 and still in activity, being approved its operation and functionality.

Speaker: Joao Baptista dos Santos (Santa Maria Design House)

Presentation

Video

10:30 → 11:00 Coffee and posters

13:00 → 14:30 Lunch

14:30 → 18:00 Tests and simulations

14:30 Microprocessor testing: characterization tests, mitigation

Most satellites use radiation-hardened microprocessors, as many organizations are concerned that a microprocessor failure could be catastrophic to the mission. Most radiation hardened microprocessors are not as capable as commercial microprocessors, and the instrument's performance might be affected by the microprocessor's capability. Commercial microprocessors can be useful for secondary, non-mission computations so that the radiation-hardened microprocessor has more capacity for mission critical processing. Qualifying a commercial microprocessor for space usage can be quite complicated, though. This talk will highlight methods for characterizing microprocessors for SEE failures, methods for mitigating microprocessors, and open questions regarding microprocessor resilience. The talk includes a short introduction to computer architecture for several
types of microprocessors.

Speaker: Heather Quinn (Los Alamos National Laboratory)

Presentation

Video

15:30 Multi and Many core Processors: Fault tolerance and Radiation tests

This work evaluates the SEE static and dynamic sensitivity of a single-chip many-core processor having implemented 16 compute clusters, each one with 16 processing cores. A comparison of the dynamic tests when processing-cores cache memories are enabled and disabled is presented. The experiments were validated through radiation ground testing performed with 14 MeV neutrons on the MPPA-256 many-core processor manufactured in TSMC CMOS 28HP technology.

Speakers: Prof. Pablo Ramos (Universidad de las Fuerzas Armadas-ESPE), Prof. Vanessa Vargas (Universidad de las Fuerzas Armadas-ESPE), Dr Raoul Velazco (Laboratoire TIMA)

Presentation

Video

17:00 Radiation tests of advanced SRAM memories

Speaker: Dr Juan Clemente (Universidad Complutense de Madrid)

Presentation

Video

16:30 → 17:00 Coffee and posters

18:00 → 18:30 End of the day discussions

19:00 → 21:00 Social Diner

Limited amount of place

Thursday 15 November

09:00 → 09:30 Registration

09:30 → 10:30 Tests and simulations

09:30 Laser Testing: Laser Simulation Test Possibilities and Facilities

Carrier generation induced by pulsed-laser excitation has become an essential tool for the investigation of single-event effects (SEEs) of micro- and nano-electronic structures. The qualitative capabilities of this approach include, among others, sensitive node identification, radiation hardened circuit verification, basic mechanisms investigations, model validation and calibration, screening devices for space missions, and fault injection to understand error propagation in complex circuits. Recent effort has built upon the success enabled by these qualitative benefits, and has focused on putting the laser SEE approaches on a more quantitative basis. This presentation will present the basic physics associated with the single-photon and two-photon excitation processes, as well as numerous case studies.

Speaker: Dale McMorrow (Naval Research Laboratory)

Presentation

Video

10:30 → 11:00 Coffee and posters

11:00 → 15:30 Mitigation and Hardening

11:00 Automotive safety challenges based on AEC Q100 / ISO 26262 requirement

Speaker: Sung Chung (QRT Inc.)

Presentation

Video

12:00 New Paradigm of error correction used for reliable embedded memories in aerospace applications

Speaker: Dr Fakhreddine Ghaffari (ENSEA)

Presentation

Video

14:30 Solar Cells

Speakers: Dr José Ramón González (ESA/ESTEC), Dr Carsten Baur (ESA/ESTEC)

Presentation

Video

13:00 → 14:30 Lunch

15:30 → 18:00 Organization

15:30 ESTEC High Bay and test rooms visit

15:30 Technical training

Speakers: Alessandra Costantino (ESA-ESTEC), Michele Muschitiello (ESA-ESTEC TEC-QEC), Dr Jaime Estela (Spectrum ARC GmbH)

Presentation 1 TID test execution

Presentation 2 Practical training

Friday 16 November

09:00 → 09:30 Registration

09:30 → 10:30 Space and atmospheric environments

09:30 Atmospheric radiation

Speaker: Prof. Frédéric WROBEL (University Montpellier 2 - IES)

Presentation

Video

10:30 → 11:00 Coffee and posters

11:00 → 16:00 COTS

11:00 COTS in Space: Constraints, Limitations and Disruptive Capability

This talk describes one application of CNES methodology for allowing using commercial (COTS) digital electronic components in large spacecrafts. The required steps the components have to successfully pass before to be authorized to fly are presented. Then, the limitation concerning COTS usable performance is outlined. Even if these specificities reduce the attractiveness of commercial components, several project configurations are highlighted where COTS components are feasibility factor for the space mission due to their contribution to system performance.

Speaker: Mr Michel Pignol (CNES)

Presentation

Video

12:00 COTS in Space: Qualified commercial components for space

Commercial electronics compared to their space qualified counterparts are increasingly proving to be fit for use in space. High performance and reliability together with reduction of qualification costs and less testing time play an important role in the development of the space market. Space- COTS are commercial components qualified for small satellite missions, which support the NewSpace technology development.

Speaker: Mr Jaime Estela (Spectrum ARC GmbH)

Presentation

Video

14:30 COTS on ground: Ultra-High energies radiation test facilities

Speaker: Mr Ruben Garcia Alia (CERN)

Presentation

Video

15:30 COTS in Space: Experience and lessons learned at ESA

Speaker: Dr Karin Lundmark (ESA)

Presentation

Video

13:00 → 14:30 Lunch

16:00 → 16:30 Organization

16:00 Concluding remarks

Speakers: Dr Raoul Velazco (Laboratoire TIMA), Dr Gregoire Deprez (ESA)

Presentation

Video