Speaker
Description
Back in 2005 NASA published an analog-to-digital converters (ADC) guideline document. It was widely used for the selection of flightworthy ADC devices for use in space flight applications. Since then, the number of available converter products has really proliferated, with many choices available, in the categories of resolution, power, speed, radiation, packaging, and a combination thereof. The application spectrum has widened as well. This presentation will describe the efforts underway where the NASA Electronic Parts Assurance Group (NEPAG), which ESA partners with, has worked with DLA (Defense Logistics Agency), JC-13 (the manufacturers of government products), and CE-12 (the users of active devices) committees to ensure current military/aerospace standards address these challenges, one example being the insertion of new technology, the Class Y initiative.
Class Y represents advancements in packaging technology, increasing functional density, and increasing operating frequency. These are ceramic-based single-die systems-on-a-chip (SoCs) with non-hermetic flip-chip construction, in high pin count ceramic column grid array (CGA) packages. These products use tiny base electrode metal (BME) capacitors for signal integrity and vented packages for thermal management (e.g., Xilinx Virtex-4 FPGAs). To address the manufacturability, test, quality, and reliability issues unique to new non-traditional assembly/package technologies intended for space applications, we introduced a new concept called Package Integrity Demonstration Test Plan (PIDTP), which provided flexibility to manufacturers in building the products the best way they knew how. This initiative resulted in a major overhaul of the performance specification for microcircuits, MIL-PRF-38535, particularly with respect to requirements for flip-chip, underfill, CSAM, column grid arrays, etc. Revision K reflecting these changes was released in December 2013. The front runner Class Y suppliers are offering functions such as processors, ASICs, and very high-speed A/D converters.
Despite severe disruptions caused by COVID-19, we were able to continue the standards activities in the last two years using virtual formats. The recent progress made in extending the standards coverage to other parts of the technology/application spectrum will also be described: the addition of organic Class Y into the draft of MIL-PRF-38535, revision M; a QMLP task group developing requirements for rad hard / rad tolerant plastic encapsulated microcircuits; a new task group taking off with the goal to develop requirements for 2.5D/3D devices; and others.
