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This ADC is composed of mainly 2 blocks:
• An 8:2 analog mux combined with an auto zeroed-amplifier (0dB, 6dB and 12dB).
• A 500kS/s ADC with an internal voltage reference generator (external capacitor free) configurable in differential or single-ended mode 11-bit SAR ADC or in 14-bit SAR ADC (in such configuration the sampling rate is limited to 300kS/s).
All the digital is hardened...
The 22FDX technology from Global Foundries is a commercial cutting-edge manufacturing process for integrated circuits. This process combines a characteristic minimum gate length of 22 nm and a FD-SOI (Fully Depleted Silicon-On-Insulator) multi-layered structure. These technological features allow adaptative body bias, ultra-low voltage supply and ultra-low leakage, that benefit, from an...
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https://www.microchip.com/
https://www.tttech.com/
The astrometric systems Very Large-Scale Baseline Interferometer and currently under development Event Horizon Imager uses the Aperture Synthesis principle to track and measure cosmic phenomena. The main advantage of such an Aperture Synthesis approach is that the image is recreated from a physically distributed set of receivers, which are fewer than the number of points in the reconstructed...
First GaN Half-bridges were developed and tested in the frame of SloGaN VLAIO project. The aim was to achieve integration of high voltage & high current transistors with low voltage control & gate drive devices.
Second step is a full feature 3..8A 200V integrated GaN IC Half-bridge been developed under an ESA GSTP program. Figure 1 shows the run1 (=prototype) of IC.
As a step forward, we...
NIRCA MkII is the second-generation ASIC from IDEAS for readout from infrared (IR) image sensors, e.g., HgCdTe/MCT-based focal plane arrays (FPA). The ASIC aims at reducing the size, weight, power and cost (SWaP-C) of infrared sensor readout systems by integrating the necessary functions and performance on a single ASIC. The NIRCA MkII is a radiation-tolerant integrated circuit (IC)...
see the article in the attached file
In this article we report about a design of new mixed-signal eNVM IP in XFAB 180nm technology with HV and SONOS (silicon–oxide–nitride–oxide–silicon) options and hardened against radiation effects. The purpose is to create a non-volatile memory (eNVM) solution for space applications. The design is in final completion stage and test vehicle building is due to be sent to manufacturing shortly...
Since more than a decade, Thales Alenia Space in Belgium is investing in a growing portfolio of RadHard ASICs with the Digital Programmable Controller as a flagship paving the way to other ASICs.
The brand new High Speed Controller, the” Swiss Knife for DCDC converters”, contains an innovative regulation , the Peak & Valley Current Control (PVCC)
In the frame of a growing Rad Hard ASIC...
PROMISE project, started at the beginning of 2020, has lived by now more than 2 years of harsh but exciting times of successful microelectronics developments. It has crossed by now the equator of its lifetime. During this time most of the IPs have pass a successful CDR, and the CDR of the Pilot Circuit ASIC, integrating all the IPs, is expected by April this year.
PROMISE stands for...
For several decades, Microchip provides one of the industry’s most comprehensive space product portfolio of radiation-hardened and radiation-tolerant solutions that includes high-performance MCUs, MPUs, FPGAs, memories, communication interfaces, frequency and timing solutions, mixed-signal ICs, custom power supplies, diodes, transistors, RF components and more. With product development...
The aim of this communication is to present the hardening approach that has been followed towards the realisation of a hardened DDR3 PHY when targeted on the C65SPACE platform of ST Microelectronics. The implementation concerns the flip-chip version of the IP. The key points that will be presented are: i) the key requirements the PHY IP should meet, ii) the PHY architecture, iii) the RTL to...
In this article, we report the design of new analog and digital IP in 22nm FDSOI and against radiation effects (DARE). The purpose is to enable a magnetic non-volatile random-access memory (MRAM) for space. A test vehicle has been taped out. It contains a range of analog IP for powering and clocking the test chip and to provide safe power up and down sequences. These blocks are integrated...
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https://www.arquimea.com/
https://www.microchip.com/
https://www.tttech.com/
LIDAR is a distance and speed measurement device using reflection characteristics of emitted light. In space applications, time-tagging LIDAR allows scanning planet surface before landing missions, formation flights by measuring distances between spacecrafts or atmospheric backscatter measurements. The main requirements for the read-out electronics are trifold: single-photon time-tagging...
Ethernet is becoming more common in spacecraft to enable hardwired communication speed, support higher data rates, and facilitate interoperability between satellites and other spacecraft. As Ethernet in space applications continues to expand, Microchip Technology has introduced a space-qualified Ethernet transceiver.
In the presentation, Microchip will introduce the VSC8541RT, European...
This paper presents a flexible Single Event Effect (SEE) test system designed to detect and record Single Event Upsets (SEU), Single Event Transients (SET), Single Event Functional Interrupts (SEFI) and Single Event Latch-ups (SEL) that may arise in digital and mixed-signal ICs from irradiation by heavy ions. The test system is based on a digital core synthesized on an FPGA, a Cortex-M3...
The DARE65T platform is an analog/mixed signal RAD-hard platform based on TSMC 65nm RF/LP technology. It includes an extensive variety of library cells like standard cells, IO, Single and Double Port RAM, PLL, ADC and DAC, bringing the first advanced node sibling to the DARE platform family.
This paper introduces a test vehicle, developed to validate functionality, perform electrical...
This paper presents the measurement results of Single-Event Transients (SET) in a commercial 65nm CMOS technology. The heavy-ion test campaign measured both total SET ionized charge and SET pulse duration. In this test chip, single transistors of different types and dimensions were implemented as victim devices. SET variation due to different supply voltages also was investigated. The detailed...
SLIME (Serial Latchup-free I2c 1Mhz link for the x-ifu Electronics) is a radhard
and clockless I2C digital module implemented in a radiation-hardened library based on
the BiCMOS SiGe ST_130nm.
This module will be used in the Warm Front End Electronics of the X-ray
Integral Field Unit for the Athena space mission.
Due to the sensitivity of the instrument, the module must have low noise...
The Summa-Integration analog to digital conversion principle is used for decades in PiKRON's company designed liquid chromatography spectrophotometric detectors as well as for winding currents sensing in permanent magnets synchronous motors and stepper motors control units. The principle has been implemented into a NanoXplore FPGA device on NX1H35AS-EK evaluation kit equipped by an analog...
https://www.altertechnology-group.com/en/home/
https://www.arquimea.com/
https://www.microchip.com/
https://www.tttech.com/
This paper presents the test vehicle (TV) of the rad-hard library developed at IMEC, referenced with the acronym DARE22G, that reflects the “Design Against Radiation Effects in 22nm”. Thanks to this test vehicle, the functional validation, the electrical performance, and the radiation hardening and sensitivity (SEE and TID effects) of the DARE22G library and a commercial DPRAM will be...
Two new ECSS standards,
- ECSS-E-ST-20-40 "ASIC, FPGA and IP Core engineering"
- ECSS-Q-ST-60-02C Rev.1 "ASIC, FPGA and IP Core product assurance"
are expected to be released this Q3-2022 after implementing any final proposals for changes collected during a Public Review expected to end this summer.
Engineering and product assurance requirements will be applicable to developments...
Back in 2005 NASA published an analog-to-digital converters (ADC) guideline document. It was widely used for the selection of flightworthy ADC devices for use in space flight applications. Since then, the number of available converter products has really proliferated, with many choices available, in the categories of resolution, power, speed, radiation, packaging, and a combination thereof....
ESA has been working on the development of a system for risk assessment and management that would deliver a classification for a particular mission or application depending on its nature (risk acceptance). As a result, a critical review of some Engineering and Product Assurance standards and methodologies is currently underway. This presentation will address the progress achieved by the time...
The application field of small satellites develops rapidly over the last years. It is expected that the number of satellites until 2029 will exceed 57000. This opens new perspectives and application possibilities, including replacement of old satellites and more complex processing needs for tasks such as satellite constellation and swarm formation.
For various applications within the...
A radiation hardened high speed serializer-deserializer (SerDes) IP for aerospace applications is presented. It is developed in TSMC 65nm technology, using the DARE65 rad-hard digital library. The maximum speed will be 6.25 Gbps and the power dissipation will be lower than 300mW per channel.
Integration of high-speed SERDES macros in a complex ASIC requires full-custom, application specific...
