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EDHPC 2025 - 2nd European Data Handling & Data Processing Conference

12–17 Oct 2025
Europe/Amsterdam timezone

EDHPC Organising Committee

Session

AI Acceleration on FPGAs and HLS

B8
16 Oct 2025, 10:50
Salle 1+2

Salle 1+2

Conveners

AI Acceleration on FPGAs and HLS

  • Luca Fanucci (University of Pisa)
  • Melanie Berg (Space R2 LLC)
  • Silvia Moranti (ESA)

Presentation materials

There are no materials yet.

  1. 117. On-orbit data processing utilizing FPGA-accelerated deep learning models
    Marko Mamić (Protostar Labs)
    16/10/2025, 10:50
    AI and Machine learning for on-board data processing
    Presentation
  2. 127. Enabling the Hardware Acceleration of Residual Layers within the FPG-AI Framework for Space Applications
    Lorenzo Ciacchini (University of Pisa)
    16/10/2025, 11:10
    AI and Machine learning for on-board data processing
    Presentation
  3. 142. FPG-AI for On-Board AI Acceleration: A Case Study for Semantic Segmentation of Maritime and Terrestrial Areas
    Tommaso Bocchi (Università di Pisa)
    16/10/2025, 11:30
    AI and Machine learning for on-board data processing
    Presentation
  4. 19. Accelerating Neural Network Inference in space by offloading heavy operations on systolic arrays
    16/10/2025, 11:50
    Presentation
  5. 163. Efficiently Escaping Low-Level Design in Digital Microelectronics by Wise Auto-Coding of HDLs from High-Level Models
    16/10/2025, 12:10
    Validation & verification, testing, qualification, simulation, modelling of complex systems
    Presentation

    Digital microelectronics for space applications have traditionally been developed at the Register Transfer Level (RTL) through manual process using Hardware Description Languages (HDLs). While this approach has served as a one-size-fits-all solution, recent challenges such as increasing system complexity and reduced times-to-market have motivated the exploration of alternative methods.

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