EDHPC 2025 - 2nd European Data Handling & Data Processing Conference

Europe/Amsterdam
Description

EDHPC 2025

The second European Data Handling & Data Processing ConferenceEDHPC 2025 – will be held from the 13th to the 17th of October 2025 in Elche, Spain. It is organised by the European Space Agency (ESA), with the support of the local tourist office. Find the latest information on the official website.

The presentations submitted will be uploaded (protected access) to the presentation materials on 9th of October, please make sure you have uploaded your updated presentation, after this date please update the presentation directly in the presentation materials.

All of the presentations will be made available after the conference after receiving permission from the authors.

EDHPC Organising Committee
    • 18:00
      Pre-opening cocktail Huerta del Curo

      Huerta del Curo

      Carrer Porta de la Morera, 49 03203 Elx – Elche / Alicante
    • EDHPC Plenary: Welcome and Keynotes Auditorium

      Auditorium

      • 1
        Conference Welcome
        Speakers: Kostas Marinis (ESA), Ali Zadeh (ESA)
      • 2
        Keynote: Josep Rosello (ESA) "The evolution of the European Earth Observation Ecosystem and related Technology needs"

        Biography
        Josep Roselló is heading the Earth Observation (EO) Technology coordination section in the EO Future Missions and Architecture Department at ESA ESTEC. He’s a Telecommunications Engineer from UPC in Barcelona (ES) and also holds an MBA from RMS in Rotterdam (NL). He joined ESA in the Data Handling Division in D/TEC in 1992, and he moved to the D/EOP Directorate in 2007. He’s been involved in the development of a large number of technologies in the area of avionics, communication, navigation and EO remote sensing, as well as in many ESA projects and programmes like Envisat, MetOp-SG, Copernicus, and also in Newspace-related ones.

        Speaker: Josep Rosello (ESA/ESTEC/EOP-SFT)
      • 3
        Keynote: Miguel Cordero (ESA): Celeste: paving the way towards Positioning, Navigation and Timing in Low Earth Orbit (LEO-PNT)

        Biography
        Miguel Cordero joined the European Space Agency as Radionavigation Engineer in 2015. He has been providing support to the navigation programmes (EGNOS and Galileo) as well as to other missions making use of space GNSS receivers. Since 2020 he has been supporting the activities related to LEO-PNT carried out by the Agency including Celeste IOD mission. Before joining ESA he worked in the development of navigation modules for UAV autopilots.

        Abstract
        Positioning, Navigation, and Timing (PNT) services enabled by Global Navigation Satellite Systems are foundational to the functioning of modern society. Despite the significant impact of PNT in economy and society, GNSS systems face well-documented limitations. Low Earth Orbit (LEO) satellites have emerged as a promising solution to address these challenges. ESA’s LEO-PNT initiative, the Celeste In-Orbit Demonstrator (IOD) aims at validating enabling technologies such as frequency-diverse signal generation and transmission, on-board orbit determination and time synchronization, and advanced small satellite platforms, to demonstrate the feasibility and benefits of augmenting existing GNSS with a LEO-based layer. Beyond the Celeste IOD, ESA is working with the European Union towards defining a potential EU LEO-PNT operational system in complement to EGNOS and Galileo. The next phase, the Celeste In-Orbit Preparatory (IOP) phase under ESA’s FutureNAV programme, will encompass technology development, industrialisation and in-orbit validation. This phase will be instrumental in shaping future operational LEO-PNT initiatives institutional or commercial.

        Speaker: Miguel Cordero (ESA)
    • 10:40
      Coffee Break
    • EDHPC Plenary: Keyontes Afternoon Auditorium

      Auditorium

      • 4
        Keynote: Tmo Dirkes (DSI): Payload Data Handling – Bridging Mission Demands and Technology Capabilities

        Biography
        Timo Dirkes became part of DSI in 2018, serving as a System Engineer focused on spaceborne mass memory and data handling equipment for commercial and ESA projects. His role expanded in 2021 when he took over the position of Head of Engineering, overseeing the technical implementation of various flight program developments. DSI Aerospace GmbH develops innovative hardware and software solutions and computer technologies for space applications. Our hardware and software are flying as part of prominent space programs such as ExoMars (Mars mission) and JUICE (Jupiter mission). Since 1997, our steadily-growing international team has been producing high- performance, customer-specific and dependable solutions.

        Abstract:
        Space missions are generating exponentially larger volumes of data, driven by increasingly advanced payloads and more ambitious scientific or commercial goals. Meeting these demands, requires high-performance data handling systems including mass memory systems with high capacities, fast data throughput and high reliability. Simultaneously, advancements in onboard data processing and the adoption of powerful COTS Processors and FPGAs are shifting the paradigm from simple storage to intelligent data handling, enabling compression, interpretation or even onboard analytics. The gap between mission requirements and available technology remains significant, highlighting trade-offs in performance, power, and reliability. Bridging this gap and establishing the relevant roadmaps will define the capabilities of future missions.

        Speaker: Timo Dirkes (DSI)
      • 5
        Keynote 4: Sergio Ramirez Navidad: Insights into the Proba-3 Mission

        Biography:
        Sergio is an aerospace engineer with a master’s degree in Aerospace Engineering, with specialty in Space Vehicles, by the Technical University of Madrid. He has almost 10 years of experience in the area of navigation data fusion and sensors, systems engineering and project management. He works at Sener Aerospace and Defense as a Product Line Leader for Navigation Systems, which include the development and production of navigation systems for space transportation (like the NAVIGA unit for the VEGA-C and VEGA-E) and autonomous flight termination systems for launchers.

        Abstract:
        The audience will discover how the Proba-3 mission pioneers solar coronagraphy and formation flying, with two spacecraft working in precise coordination. They’ll learn about the technical innovations, operational challenges, and commissioning process that have made this mission unique. Finally, the keynote will share lessons learned and future applications, highlighting Proba-3’s impact on space technology.

        Speaker: Sergio Ramirez Navidad (SENER Aeroespacial)
    • 12:30
      Lunch
    • EDHPC Tutorial: ADHA 101 Auditorium

      Auditorium

      Conveners: David Steenari (ESA), Kostas Marinis (ESA)
    • EDHPC Tutorial: BrainChip part 1 Salle 2

      Salle 2

      Conveners: Alf Kuchenbuch (Brainchip), Gilles Bezard (Brainchip)
    • EDHPC Tutorial: Mathworks: AI-based Spacecraft Pose Estimation on ANY FPGA - part I Salle 1

      Salle 1

      Conveners: Lucas Garcia (Mathworks), Stephan van Beek (MathWorks)
    • EDHPC Tutorial: Radiation Testing Conference Room

      Conference Room

      Conveners: Dr Maris Tali (ESA), Melanie Berg (Space R2 LLC), Pierre Maillard (AMD, INc.)
      • 12
        Radiation Effects in FPGAs and SoCs: Adapting to a Changing Technological Landscape

        Abstract
        FPGAs and SoCs are well-suited for complex designs and evolving algorithms in terrestrial and space applications, especially compared to ASICs. This tutorial covers SRAM and non-volatile FPGA architectures, their evolution into modern Adaptive SoCs, and mechanisms behind Single Event Effects (SEE) and Total Ionizing Dose (TID). We’ll also explore how Functional Safety, RAS, and AI/ML applications have impacted SEE metrics, mitigation, and testing. It includes error classifications, mitigation strategies, testing methods, and results. The final section addresses challenges and solutions for next-gen markets, including telecom, automotive, data centers, avionics, and defense sectors.

        Biography
        Dr. Pierre Maillard leads the Radiation Effects & RAS Solutions team at AMD’s Adaptive Embedded Computing Group (AECG), focusing on the architecture, development, and validation of radiation-tolerant FPGA and SoCs solutions for markets such as Telecom, Avionics, Automotive, Datacenters, AI, Defense and Space. He has more than 20 issued patents in radiation effects on electronics and is a Senior Member of IEEE, with over 20 publications and presentations in industry-leading conferences and journals. Dr. Maillard holds M.S. and Ph.D. degrees in Electrical Engineering from Vanderbilt University and an M.S. from the University of Montpellier II.

        Speaker: Pierre Maillard (AMD, INc.)
      • 13
        Radiation Hardness Assurance for Complex Devices: The Untold Story

        Abstract
        For space systems, particle ionization can cause faults in microelectronics that inhibit operation and hence reduce reliability. In turn, radiation hardness assurance methods have been developed to perform system failure analyses. These practices have been applied for decades and are now in need of being modernized for better characterization of today’s complex system applications. This presentation describes what is required to test and analyze complex components such as SoC and FPGA devices, how conventional methods are insufficient, and how new methods can provide optimal coverage for failure analyses.

        Biography
        Mrs. Melanie Berg has over 35-years of experience as a designer, verification engineer, instructor, and reviewer for ASIC and FPGA applications. Her more visible accomplishments are her contributions to the FPGA designs for the NASA sponsored New Horizons Pluto and Beyond Mission; and her research/development in mitigation strategies. Melanie is a member of the Radiation Effects and Analysis group at NASA/GSFC; and is the founder/CEO of Space R3 LLC. She has published and presented several papers regarding: ionization and microelectronic error-response characterization, reliable synchronous design methodology, robust verification techniques, mitigation strategies for critical circuitry, reliability/survivability prediction calculations, and hardness assurance for space flight systems.

        Speaker: Melanie Berg (Space R2 LLC)
      • 14
        Radiation Testing Tutorial Roundtable
        Speakers: Dr Maris Tali (ESA), Melanie Berg (Space R2 LLC), Pierre Maillard (AMD, INc.)
    • 16:00
      Coffee Break
    • EDHPC Tutorial: Brainchip part 2 Salle 2

      Salle 2

      Conveners: Alf Kuchenbuch (Brainchip), Gilles Bezard (Brainchip)
    • EDHPC Tutorial: HW accelerators, and ESA Harmonization Process Auditorium

      Auditorium

      Conveners: Lucana Santos Falcon (European Space Agency), Apolline Queno (Akkodis), Kostas Marinis (ESA)
      • 15
        Hardware Accelerators
        Speaker: Lucana Santos Falcon (European Space Agency)
      • 16
        ESA Harmonisation Process, and overview of TDE/GSTP programs

        This presentation will outline the ESA Technology Harmonisation process, including its objectives, scope, and benefits for space entities, as well as the timeline for the 2026 Harmonisation Cycles. There will be a particular emphasis on the Onboard Computers, Data Handling, and Microelectronics (OBDHM) dossier, which is scheduled for revision during the 2026 cycle 2.
        It will also provide insight into how Harmonisation outcomes contribute to the ESA GSTP and TDE programs.
        Industry and member state representatives are encouraged to attend to learn about upcoming technology development opportunities and the procedures for applying to these tenders.

        Speakers: Apolline Queno (ESA TEC-RH), Kostas Marinis (ESA)
    • EDHPC Tutorial: Mathworks: AI-based Spacecraft Pose Estimation on ANY FPGA - part II Salle 1

      Salle 1

      Convener: Adam Taylor (Adiuvo Engineering Training ltd)
    • EDHPC Tutorial: Satellite Radio Frequency payloads and Instruments Conference Room

      Conference Room

      Conveners: Dr Adem Coskun (ESTEC), Max Ghiglione (ESA)
    • 18:00
      Opening cocktail
    • ADHA Plenary Auditorium

      Auditorium

      Conveners: David Steenari (ESA), Kostas Marinis (ESA)
    • On-board Processing Architectures Salle 1+2

      Salle 1+2

      Conveners: Gianluca Furano (ESA/Data Systems Division), Dr Maris Tali (ESA), Oskar Flordal (Unibap AB)
      • 25
        Reshaping the Earth-Observation value chain through AI-eXpress powered satellite-as-a-service
        Speaker: Dr Vito Fortunato (Planetek Italia)
      • 26
        Satellite-as-a-Service Architecture for ML Edge Computing on Heterogeneous Processing Platforms

        This paper presents a Satellite-as-a-Service (SaaS) architecture designed to enable flexible and efficient deployment of Machine Learning (ML) workloads on heterogeneous edge hardware platforms in space. Leveraging container-based virtualization (Docker) and an orchestration framework (Kubernetes), our approach abstracts hardware complexity and supports a variety of accelerators — FPGAs, TPUs, VPUs and NPUs — within a unified development and deployment environment. We integrate DevOps design principles delivering a reconfigurable stack that supports rapid ML model updates and deployment on target hardware. By treating satellites as extensible service platforms, we demonstrate how containerization and hardware abstraction streamline the onboarding of advanced ML algorithms, ranging from convolutional neural networks for image processing to neuromorphic paradigms for ultra-low-power inference. We detail how standardized APIs and modular workflows promote interoperability across multiple satellite systems and heterogeneous hardware accelerators.

        Speaker: Evgenios Tsigkanos (OHB Hellas)
      • 27
        Modeling Latency and Energy Trade-offs in Emerging Space Edge Computing Architectures
        Speaker: Dorian Chenet (Thales Alenia Space, Université de Rennes 1)
      • 28
        Intelligent Platform Study outcomes: End2end architecture to unlock System Autonomy

        The Intelligent System Initiative is a crosscutting initiative that aims to advance the autonomy of space-based systems in a disruptive way. The Initiative adopts a global system-of-system approach, exploiting synergies with application domains from a multitude of sectors.

        Speaker: Chiara Brighenti (S.A.T.E. S.r.l.)
    • Buses & Networks - SpaceWire & SpaceFibre: #1 Conference room

      Conference room

      Conveners: Dr Bruce Yu (ESA), Pietro Nannipieri (University of Pisa)
      • 29
        Introduction
        Speakers: Dr Felix Siegle (ESA-ESTEC), Dr Bruce Yu (ESA)
      • 30
        A Generic SpaceWire Transport Layer

        The transport layer is the essential part in the open system interconnection (OSI) reference model, since it is the interface between the software-oriented layers 5-7 and hardware-oriented layers 1-3. On the one hand, it provides a general approach for data exchange with the software-oriented layers, independent of the underlying hardware. On the other hand, it is responsible for an efficient and reliable use of the underlying hardware. These characteristics make the transport layer crucial for the effective usage of a communication system, as it significantly reduces the implementation effort for the software-oriented layers.

        The lack of a transport layer is a huge disadvantage. Combining the functionality of different communication layers into single application specific protocols can lead to the coexistence of multiple, non compatible approaches, resulting in a higher implementation effort for integrating new applications. Therefore, the existence of a transport layer is fundamental for both communication software and hardware, to provide established communication concepts, which are a precondition for the use of standardized software libraries, and to integrate modern computing trends (e.g. Big Data, Data-Mining, machine learning, cyber security).

        SpaceWire does not yet define a general transport layer. This paper presents the approach of a minimalist SpaceWire transport layer, as common base for the implementation of higher level protocols. It comprises both the hardware related SpaceWire transport node and the associated software counterpart as well as the associated protocol. The transport layer implementation is one result of our longstanding SpaceWire development and is already in use in several robotic systems.

      • 32
        Towards a low-effort SpaceFibre evaluation
        Speaker: Rafael Plonka
      • 33
        Ultra-Fast, Low-Overhead SpaceFibre Communication for System-on-Chips
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 10:20
      Coffee Break
    • ADHA (Architectures & Equipment) Auditorium

      Auditorium

      Conveners: Mr Vilhelm Geijer (Beyond Gravity), Eleonora Mariotti (ESA)
    • Payload Processing Architecture Salle 1+2

      Salle 1+2

      Conveners: Mr Orion AZZIS (THALES ALENIA SPACE), Richard Jansen (ESA)
      • 39
        A Camera Payload and Processing Unit for Autonomous Satellite Deployment Verification accelerated by Soft GPU

        Engineering Minds Munich GmbH has developed a Camera Payload and Processing Unit (CPPU) for in-orbit monitoring and verification of satellite deployables. Reliable confirmation of solar panel or antenna deployment remains challenging for small satellites due to limited telemetry bandwidth and constrained power budgets.

        The CPPU provides a compact and dependable solution by integrating camera interfacing, image buffering, and actuator control into a single unit. Cameras can be placed up to 1 m from the processing board, enabling flexible positioning for optimal visibility of critical mechanisms. Built on FPGA and bare-metal software, the platform emphasizes deterministic operation, testability, and robustness in the space environment. A flight model has already been delivered and validated, demonstrating the maturity of the development.

        Current developments extend the CPPU with autonomous deployable-shape extraction, using a soft-GPU accelerated pipeline. The approach reduces image data from 8 Mbit to 1.6 kbit (a three orders-of-magnitude reduction) while retaining key geometric information in vectorized format.

      • 40
        From Zynq UltraScale+ to Versal AI Core based High Performance Processing solutions
        Speaker: Alexandre MEGE (Airbus Defence and Space)
      • 41
        Towards Integration of COTS Systems for High Performance Computing Applications in High-Reliability Space Systems
      • 42
        A reliable supervisor system utilizing an FD-SOI FPGA and MRAM for COTS-based payload data processing
        Speaker: Clemens Horch (Fraunhofer EMI)
      • 43
        Memory Synchronization in Multi-Processing Systems for Thermal Optimization in Satellite Payloads
    • Buses & Networks - SpaceWire & SpaceFibre: #2 Conference room

      Conference room

      Conveners: Dr Bruce Yu (ESA), Pietro Nannipieri (University of Pisa)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #1 Conference room

      Conference room

      Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)
    • 12:30
      Lunch
    • ADHA (Equipment) #1 Auditorium

      Auditorium

      Conveners: Mr Dario Pascucci (Thales Alenia Space), David Steenari (ESA)
    • DPUs & Instrument Electronics Salle 1+2

      Salle 1+2

      Conveners: Mr Alberto Urbón Aguado (ESA - ESTEC - TEC-EDM), Mr Sybren de Jong (NLR)
    • Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #2 Conference room

      Conference room

      Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 15:40
      Coffee Break
    • ADHA (Equipment) #2 Auditorium

      Auditorium

      Conveners: Julian Bozler (Airbus Space Systems), Enrico Melone (TEC-EDD)
      • 62
        ADHA Hyper Compute Units (AHCU): Case-Study for Integration of COTS SoC Devices in ADHA form factor for scalable on-board data centre units
        Speaker: Ivan Rodriguez-Ferrandez (Coros Space)
      • 63
        Orion: Plug into to the future
        Speakers: Prem Kumar Hari Krishnan (Evoleo Technologies GmbH), Mr Rodolfo Martins (Evoleo Technologies GmbH)
      • 64
        LION DPU – ADHA 3U-based architecture for data handling module for safety operation
        Speaker: Mr Grzegorz Gajoch (KP Labs)
    • Payload Control & Processing Units Salle 1+2

      Salle 1+2

      Conveners: Jon Caudepon (OHB), Dr Maris Tali (ESA)
    • Buses & Networks - Ethernet (TSN/TTE) & CAN-Bus: #3 Conference room

      Conference room

      Conveners: Dr Felix Siegle (ESA-ESTEC), Elisa Ballatore (SII)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 20:00
      Surprise Social Event Plaça de Baix

      Plaça de Baix

    • ADHA (Building Blocks & Future) Auditorium

      Auditorium

      Conveners: David Gonzalez-Arjona (GMV Aerospace and Defence), Kostas Marinis (ESA)
      • 73
        An Overview of the Foreseen MBSE Approach for ADHA Units and Modules: Methodologies and Applications
        Speaker: Jon Caudepon
      • 74
        High-Performance, Multi-Lane, SpaceFibre Routing Switch for ADHA

        The Advanced Data Handling Architecture (ADHA) concept has been developed in collaboration between European industry (integrators, and hardware suppliers) and the European Space Agency (ESA). ADHA defines a set of specifications for electronic data-handing units [1]. which is based on standardised, interchangeable, and interoperable electronics modules. SpaceFibre [2] provides the high data-rate interconnect for ADHA, both inside an ADHA unit, interconnecting the AHDA modules, and externally. This paper describes a SpaceFibre routing switch for AHDA hardware modules which is able to support the demanding data rates and interconnect architecture of ADHA applications.

        Speaker: Dr Steve Parkes (STAR-Dundee)
      • 75
        EDHPC2025 ADHA sessions wrap-up
        Speaker: David Steenari (ESA)
    • Advanced On-Board Processing I Salle 1+2

      Salle 1+2

      Conveners: Enrico Melone (TEC-EDD), Leonidas Kosmidis (Barcelona Supercomputing Center)
      • 76
        Real-Time Onboard Data Accumulation and Pre-Processing for the Photospheric Magnetic field Imager on ESA’s Vigil mission

        ESA’s Vigil mission is an operational mission planned to monitor the solar drivers of space weather conditions from the Lagrange point L5. The Photospheric Magnetic field Imager (PMI) on this mission shall provide full-disk vector magnetograms of the solar photosphere at a cadence of 30 minutes with 20-minute latency for its priority-1 data products. In addition, raw filtergrams and high-cadence line-of-sight magnetograms and Dopplergrams at a cadence up to 1 minute will be provided as supplementary data products. To meet the real-time processing requirements imposed by the telemetry volume, onboard pipelines are implemented in the processing unit hardware to produce low latency data products. In order to handle this computationally heavy task while meeting the latency requirement of the mission, the pipelines are implemented on a Field Programmable Gate Array (FPGA). This paper describes the series of steps involved in the first part of onboard data processing – from image acquisition and accumulation to polarimetric demodulation. It also discusses the parallel processing of the three pipelines in a resource-constrained FPGA in order to obtain a real-time processing environment which complies with PMI’s stringent requirements on accuracy, stability and reliability with the limited resources available on a deep space mission.

        Speaker: Deepa Muraleedharan (Max Planck Institute for Solar System Research, Technische Universität Braunschweig)
      • 77
        Optimizing Methane Detection Onboard Satellites: Speed, Accuracy, and Low-Power Solutions for Resource-Constrained Hardware
        Speaker: Jonáš Herec (Zaitra)
      • 78
        Towards real-time edge EO foundational models: CORSA on Hailo AI accelerator
        Speaker: Nick Witvrouwen (VITO)
      • 79
        On board Data Processing Orchestrator
        Speaker: Mrs Adele Karam Hankache (Thales Alenia Space)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 10:20
      Coffee Break
    • DHS Architectures Auditorium

      Auditorium

      Conveners: Mr Antoine Di Via (ESA), Mr Michal Gumiela (KP Labs)
    • Advanced On-Board Processing II Salle 1+2

      Salle 1+2

      Conveners: Alberto Valverde Carretero (ESA), Enrique García Núñez (Airbus Crisa)
    • AI for FDIR & Autonomous Operation Conference room

      Conference room

      Conveners: Eleonora Mariotti (ESA), Dr Vito Fortunato (Planetek Italia)
      • 92
        Hera AI FDIR - On Board Telemetry anomaly detection using ML

        Abstract— Autonomous fault and anomaly detection is critical for ensuring the safety and success of space missions, addressing the limitations of ground-based analysis due to bandwidth constraints and operational delays. The conventional approach in Space Operations involves using Out-of-Limits (OOL) alarms for anomaly detection, which may prove insufficient in identifying and responding to complex anomalies or unforeseen novelties within the range of nominal values [1], [2]. In our previous work [3], we proposed a Machine Learning (ML) approach for on-board telemetry anomaly detection that addresses these limitations. We demonstrated a proof-of-concept integration of a TensorFlow model onto a radiation-tolerant LEON 3 processor and benchmarked various unsupervised and semi-supervised techniques with respect to their performance, memory footprint, and runtime. Our recent advancements focus on bridging the gap between a proof-of-concept solution and a nearly production-ready system. Mainly, we focused on preparing a semi-automatic pipeline for model training and deployment, experimented with other types of machine learning models, and created a patch for TensorFlow Lite for Microcontrollers (TFLM) which allows integration to the LEON 3 processor while still following the guidelines regarding software safety. Additionally, we incorporated uncertainty quantification (UQ) techniques to provide a more reliable assessment of the black-box model’s outputs.

        Index Terms— anomaly detection, novelty detection, machine learning, LEON processor, TensorFlow, TFLM.

        Speaker: Lukáš Málek (Huld)
      • 93
        Advanced Health Monitoring and Failure Identification in Satellite Avionics using Machine Learning
      • 94
        Enhanced Reliability and Autonomy for Satellite Operations Through AI-Driven Predictive Maintenance of Control Moment Gyroscopes
      • 95
        Deploying AI-based Spacecraft Telemetry Anomaly Detection on an Adaptive System-on-Chip Solution
        Speaker: Andrew Mccormick (Alpha Data Parallel Systems Ltd.)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 12:30
      Lunch
    • Poster Sessions
      • 96
        A Modular Building Block for Advanced Space Robotic Servo Control
        Speakers: Mr Gabriele Mantovani (Leonardo Space), Ms Francesca Cusimano (Leonardo Space)
      • 97
        Advanced Onboard Data Processing for the Photospheric Magnetic Field Imager in ESA’s VIGIL Mission
      • 98
        An Avionics Ecosystem for Small- and Mid-Size Satellites Based on 3U-ADHA Units and Modules
        Speaker: David Steenari (ESA)
      • 99
        Analysis and Implementation of DVB-S2 in the UHF Band for STRATHcube Downlink Communications
        Speaker: Daniel Stebbings (University of Strathclyde)
      • 100
        ASIL2ECSS: Reusing Automotive Certification and Qualification Standards to Lower the Cost of Space Certification and Qualification for COTS Processors/SoC
      • 101
        Design decisions of the deep-space Data Handling Subsystem Basic Software within the Advanced Data and Power Management System (ADPMS)
        Speaker: Conor Begley
      • 102
        Design of machine learning payloads for technology and operations development through the lens of two space missions
      • 103
        Enhancing Flight Software Development through a Model-Based Approach: A Case Study on Alsat-1B

        Developing satellite flight software (FSW) presents considerable challenges, requiring rigorous methodologies to ensure both reliability and efficiency. In this paper, we explore the application of Model-Based Development (MBD) to the periodic operations within the Attitude and Orbit Control System (AOCS) of the Alsat‑1B satellite. Our approach systematically models, simulates, and validates these functions using Unified Modeling Language (UML), Foundational UML (fUML), and Action Language for fUML (ALF). A pivotal aspect of our methodology is the use of ALF as an intermediary layer between the high-level model and the final code generation, ensuring that behavioral specifications are accurately translated into executable code. We evaluate the system’s robustness by simulating various error scenarios, including timing irregularities and state inconsistencies. The results demonstrate that our method facilitates early detection of design issues and supports a more reliable transition from model to code. This work highlights the potential of MBD to streamline FSW development for small satellites, offering valuable insights into enhanced testing and validation practices

        Speaker: Dr Youcef Bouziane (Satellites Development Center, Algerian space agency)
      • 104
        Evaluation of new NIRCA Mk-II ASIC in real camera configuration
      • 105
        Explaining raw data complexity to improve satellite onboard processing
        Speaker: Adrien DORISE (CNES)
      • 106
        Fast-SEnSeI: Lightweight Sensor-Independent Cloud Masking for On-board Multispectral Sensors
      • 107
        From Shelf to Space: A Practical Evaluation of Radiation Hardness of COTS NVMe SSDs
        Speaker: Mathieu Erbas
      • 108
        Instrument Control Unit (ICU) for Multi-Purpose Payloads: A Versatile and Modular Solution

        The increasing demand for commercial payloads has driven the development of innovative, high-performance control and data acquisition systems. In this context, the Instrument Control Unit (ICU) emerges as a key component for the efficient control and management of Electro-Optical payloads. Our research presents an advanced ICU architecture that leverages the computational power of the SAMRH71 processor alongside the real-time capabilities of the RTG4 FPGA. This synergy enables the management and processing of large volumes of high-speed data, a critical factor for modern high-resolution observation technologies.
        The ICU is designed for both high-performance data acquisition and exceptional modularity and flexibility. Its architecture facilitates integration into a wide variety of space payloads, allowing adaptation to different mission requirements. Key functionalities include TMTC (Telemetry and Telecommand) SpaceWire Interface and High-Speed Serial Link (HSSL) with Platform, Time Synchronization, Power Conditioning and Distribution and Thermal Control, and the management of up to two cameras via SpaceWire and Universal Asynchronous Receiver-Transmitter (UART) interfaces. Furthermore, the system can optionally incorporate a data compression module to reduce downlink bandwidth requirements when handling large datasets from multispectral, hyperspectral, and radar sensors. The unit is also engineered to drive stepper motor mechanisms for critical operations such as refocusing and shutter control, thus enhancing image quality.
        A robust power management strategy is implemented by conditioning power from an unregulated primary bus and distributing it effectively across various subsystems, ensuring stable and reliable operation under unpredictable conditions. The ICU supports comprehensive in-flight reprogramming of both firmware and application software, including updates to the FPGA firmware and subsystem firmware. This dynamic reprogrammability enables the unit to adapt to evolving mission requirements and significantly extends the payload’s operational lifespan.
        The core hardware components — the SAMRH71 Rad-Hard Microprocessor and the RTG4 radiation tolerant FPGA —complement each other in meeting the demanding requirements of spaceborne data acquisition. The SAMRH71 delivers high computational performance with low power consumption through its internal operating system (FreeRTOS), while the RTG4 provides real-time processing, and high data transfer performance (up to 5 Gbps) via its built-in serdes blocks. Moreover, thanks to the redundant interfaces toward platform and the high quality of components (at least ESCC Class 2 or equivalent), the ICU enhances the robustness of the Payload and its reliability figure.
        The ICU has been designed to meet the requirement of three different E.O. Payloads in development at Leonardo Space Business Unit: Very High Resolution (VHR), Thermal Infrared (TIR) and Hyperspectral (HYP). The VHR payload, optimized for high-resolution Earth observation, features a refocusing mechanism to enhance image quality for applications ranging from environmental analysis to precision agriculture. The TIR payload requires high thermal control performance, measurement accuracy and stability. Finally, the ICU is tailored for hyperspectral imaging, providing high data management capability from two cameras. These applications underscore the ICU’s versatility and its ability to serve multiple missions in Earth observation.

        Speaker: Alessio Fanfani (Leonardo)
      • 109
        New type of EGSE for ADHA modules / units
      • 110
        OBPMark and OBPMark-ML - Computational Benchmarks for On-Board Data Processing and Machine Learning in Space Applications
        Speaker: David Steenari (ESA)
      • 111
        PrAICC: A Predictible Inter-Core Communication Model for AMP systems
        Speaker: Sébastien Levieux (Université de Bretagne Occidentale)
      • 112
        Rad-Hard Telemetry and Telecommand Mixed-Signal IC Suitable for RIU, RTU, and ICU Satellite Subsystems
        Speaker: Dr Ernesto Pun-García (ARQUIMEA Research Center)
      • 113
        The Space Power Standard: Architecture, Behavior and Connectivity

        The Space Power System standard is an emerging standard for space power systems being developed by NASA and industry in both the USA and the UK [1]. This paper first introduces the Space Power System standard explaining the rationale behind the standard. It then outlines the architecture of the Space Power System and details its various functional components, the power modules, which include power sources, energy stores, power converters, and power switches. The behaviors of the various power modules are then considered. Finally, the way in which the power modules are connected using power channels, power interfaces, power links, and buses, is addressed.

        Speaker: Dr Steve Parkes (STAR-Dundee)
      • 114
        Towards Efficient On-Board AI: Performance Benchmarks of the Jetson Orin NX for Space Applications
        Speaker: Sebbe Van der Smissen (EDGX)
      • 115
        YoShI: YOLO-ODARIS Ship-detection Interface – An Innovative Approach to On-board Data Analysis for Ship-detection
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 19:00
      Cocktail Altamira Castle (Arqueological Museum of Elche)

      Altamira Castle (Arqueological Museum of Elche)

    • OBC Auditorium

      Auditorium

      Conveners: Kostas Marinis (ESA), Rodolfo Martins (Evoleo Technologies GmbH)
      • 116
        NANOhpc-obc: Scalable Multicore RISC-V based Fault-Tolerant High Performance OBC Platform for In-Orbit AI Applications
        Speaker: Bojan Kotnik (SkyLabs d.o.o.)
      • 117
        OBCU-500: the New Space OBC by AIRBUS
        Speaker: Matthieu NOUARD (Airbus Defence and Space)
      • 118
        FoX: A Modular Platform for a Commercial Space Computer

        FoX (Flexible on-board avioniX) is a modular platform based on COTS components. A tailored SpaceVPX backplane is used, keeping only the features deemed necessary for the intended applications and use cases. To enable use of modern software architectures, Ethernet is the primary protocol for internal communication.

        Speaker: Mr Vilhelm Geijer (Beyond Gravity Sweden)
    • Advanced Processors & SoCs Salle 1+2

      Salle 1+2

      Conveners: Peter Sinander (Frontgrade Gaisler), Richard Jansen (ESA)
    • RF OBP (NAV/IoT) Conference room

      Conference room

      Conveners: David Gonzalez-Arjona (GMV Aerospace and Defence), Max Ghiglione (ESA)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 10:20
      Coffee Break
    • S/C Platform Control Unit Auditorium

      Auditorium

      Conveners: Rafael Plonka, Mr Pasquale Tedesco (TELESPAZIO BELGIUM SRL)
      • 125
        Design & Qualification of a Satellite Security Unit for Lower-Class Missions
      • 126
        Avionics Centralized Unit – All-in-one solution for satellite platform from AEROSPACELAB

        The Avionics Centralized Unit (ACU) from Aerospacelab integrates all the essential functionalities to manage a satellite platform. It provides in one subsystem the features typically spread over multiple subsystems: on-board computer, S-band TTC transceiver, GNSS receiver, thermal management, various subsystems drivers (magnetorquers, HDRM), communication and power interfaces. Identical modules can be used multiple times to enable redundancy and increase reliability.

      • 127
        Design Drivers for SpaceVNX+, a Small Form Factor Electronics Unit for Space Applications

        SpaceVNX+ [1] is a standard for small form factor equipment modules and units which is being designed specifically for space applications. Its modules are substantially smaller than a 3U Eurocard. SpaceVNX+ provides a standard platform for the implementation of the entire range of avionics applications on-board a spacecraft, from simple remote terminal units to high-performance payload data-handling units. SpaceVNX+ is intended to be complementary to larger form factor standards such as SpaceVPX [2] and ADHA [3]. This paper considers the critical design drivers for SpaceVNX+ that make it suitable for space applications, including thermal, size, modularity, connectivity, reliability and redundancy, and electrical constraints. The design of SpaceVNX+ is being driven by these considerations.

        Speaker: Dr Steve Parkes (STAR-Dundee)
      • 128
        Vega-E methalox engine controller
        Speaker: Mr Jesus Ortiz Martín (Airbus Crisa)
    • AI Acceleration on FPGAs and HLS Salle 1+2

      Salle 1+2

      Conveners: Prof. Luca Fanucci (University of Pisa), Melanie Berg (Space R2 LLC), Silvia Moranti (ESA)
    • RF OBP (SAR) Conference room

      Conference room

      Conveners: Ken O'Neill (AMD), Gianluca Furano (ESA/Data Systems Division)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 12:30
      Lunch
    • Mass Memory & Compression Auditorium

      Auditorium

      Conveners: Julian Bozler (Airbus Space Systems), Dr Felix Siegle (ESA-ESTEC)
      • 139
        MMU-NXT – Power and Thermal Design of a Next Generation High Data-Performance Mass Memory Unit

        The increasing data rate demands of upcomingEarth observation missions require next-generation mass memoryunits (MMUs) capable of significantly higher throughput thancurrent solutions. In response, the MMU-NXT project — devel-oped within the ESA GSTP framework — introduces a state-of-the-art memory system featuring high-performance componentssuch as a Versal FPGA, DDR4 RAM, QDRII+ SRAM, andhigh-speed SpaceFibre interfaces, supporting data rates up to20 Gbit/s and 48 Tbit storage capacity. This paper focuses onthe power architecture of the Mass Memory Module (MMM),addressing the challenges of delivering precise and efficientpower to multiple high-current and noise-sensitive voltage rails.In addition, the thermal management strategy, including heatextraction techniques for the FPGA and memory components, ispresented and validated through simulation. The results providea robust baseline for future high-performance satellite memorysystems.

        Speaker: Markus Ahrens (DSI Aerospace GmbH)
      • 140
        Challenges in the use of a Third Generation Flash Memory for space applications
      • 141
      • 142
        CCSDS124-Compliant Minimal-Footprint IP Core for Real-Time Telemetry-Data Compression
        Speaker: Samuel Torres-Fau (IUMA - Universidad de Las Palmas de Gran Canaria)
      • 143
        Beyond Data Handling: Micro-Datacenter in Space for Converged Missions
    • AI Acceleration with GPUs & Dedicated HW Salle 1+2

      Salle 1+2

      Conveners: Leonidas Kosmidis (Barcelona Supercomputing Center), Lyana Usa
    • RF OBP (COM) Conference room

      Conference room

      Conveners: Mr Raúl Regada Alvarez (Thales Alenia Space), Dr Adem Coskun (ESTEC)
      • 149
        Feasibility of Advanced COTS RF Transceivers for Radio Frequency Payload Processing
        Speaker: Dr Adem Coskun (ESTEC)
      • 150
        Heterogeneous Compute for Regenerative 5G-NTN Processing: A Versal-Orin Payload Design
        Speaker: Mr Wouter Benoot (EDGX)
      • 151
        Synthetic Data Generators for Enhanced Space-based Network Traffic Modeling

        Synthetic data generators (SDGs) are indispensable tools in telecommunications and satellite communications, providing a means to simulate otherwise hard-to-obtain realistic traffic scenarios for pre-deployment testing and system optimization. This paper introduces a framework for generating synthetic bandwidth demand data by integrating macro-scale and micro-scale approaches. The macro-scale SDG models long-term trends, daily and weekly seasonality, random noise, and occasional spikes over an extended period of time, typically a year. In contrast, the micro-scale SDG captures short-term, minute-level variations within a day or week, adjusted for different application demands such as phone calls, video calls, and video streams. The proposed ensemble SDG merges these scales, producing synthetic datasets that provide high fidelity in both broad and granular temporal views of bandwidth demand. We further extend the model by scaling demand with population density and projecting it onto satellite beam footprints for SatCom applications. This paper details the mathematical formulations, implementations, and theoretical underpinnings of each SDG component, demonstrating their effectiveness and realism through experimentation. The proposed framework supports a wide range of applications, enhancing the ability to plan, optimize, and innovate in the field of (not only satellite) telecommunications.

      • 152
      • 153
        Onboard Machine Learning for Satellite Edge Computing: The SPAICE Project Use Case
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 15:40
      Coffee Break
    • SW Execution Platforms Auditorium

      Auditorium

      Conveners: Carlos Domínguez (GMV), Maxime Perrotin (ESA)
    • Performance & Computational Benchmarking Salle 1+2

      Salle 1+2

      Conveners: Aubrey Dunne (Ubotica Technologies), Dr Maris Tali (ESA)
      • 157
        Towards Agile and Efficient AI Inference on Space-Grade Computing Platforms

        Biography:
        Mandar Harshe is a Senior Software Developer with over 10 years experience in developing high-performance applications on Edge devices, including experience in the entire pipeline of AI development - from training and development of AI models to writing optimized inference software in production environments.

        Speaker: Dr Mandar Harshe (Klepsydra Technologies AG)
      • 158
        On-Board Performance Benchmark (“OBPMark”) of Arm NEON SIMD on Teledyne e2v LS1046-Space and LX2160-Space Space-Grade Processors
        Speaker: Manuel Blanco (Teledyne e2v)
      • 159
        Design and Implementation of an Open Source Machine Learning Benchmarking Suite for On-board Space Systems
        Speaker: Jannis Wolf
      • 160
        Evaluating Quantum-Inspired Algorithms for Autonomous Spacecraft Optimization: A Comparative Study of FPGA, CPU and GPU Implementations
        Speaker: Tomoya Kawakami (Mitsubishi Electric Corporation)
    • AI Engines & Neuromorphic Conference room

      Conference room

      Conveners: Dr Juan Pedro Cobos Carrascosa (Frontgrade Gaisler), Laurent Hili (ESA)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 19:00
      Gala Dinner
    • Flight Software Use Cases Conference room

      Conference room

      Conveners: Arnaud Bourdoux (European Space Agency), Michał Kostrzewa (N7 Space)
      • 165
      • 166
      • 167
        Advances in Category-A Flight Software Production and their Application to I-HAB

        Software development to Category A following the ECSS standard represents the highest level of criticality for space applications, requiring the most rigorous verification and validation processes to avoid catastrophic consequences. This paper presents the advances made by GTD in developing systematic guidelines and tools for ECSS Category A flight software production, with specific application to the application software development and qualification for the I-HAB module contributed by ESA to the Lunar Gateway project. The work addresses historical pitfalls in past approaches to Category A qualification, introduces new open-source tools, and demonstrates practical adaptation to diverse computing environments including target processor systems and operating systems infrequently used by the European space industry.

        Speaker: Andoni Arregi (GTD GmbH)
      • 168
        NAVIGA GNSS ASW: GNSS Receiver Application Software for Launch and Re-entry Vehicles based on AGGA-4
    • AI Model Optimization & Reliability Salle 1+2

      Salle 1+2

      Conveners: Evgenios Tsigkanos (OHB Hellas), Gabriela Mystkowska (University of Pisa)
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 10:20
      Coffee Break
    • Design Methodologies, Emulators & Simulators Conference room

      Conference room

      Conveners: Jorge Lopez Trescastro (ESA), Pablo Ghiglino
      • 173
        SKE: emulation of on-board computer environments in operational simulators

        SKE is a software application for general-purpose Linux host servers that allows to emulate the partitioned environment designed for computers on-board satellites running mixed-criticality systems that require time and space partitioning and fault detection and isolation. The benefits of using SKE are manyfold, from helping to develop in Linux environments the mentioned systems that will run on top of the XtratuM/NG (XNG) hypervisor, up to be exploited by operational simulators to run on-board computers faster than real time. In this latter context, this paper shows how SKE is being integrated in the CNES’s KOSMOS framework to provide the on-board computer environment inside a full numerical simulator of a swarm of satellites. SKE is aimed to provide the expected functionality of the XNG hypervisor, offering faster-than-real-time performances when executing the flight software and still keeping a good level of representativity in terms of functional behaviour.

        Speakers: Carlos Cuesta-Martínez (FENTISS), Julien GALIZZI (CNES)
      • 174
        An Open-Source Approach for Emulating Complex Embedded Systems: Enhancing Software Verification with Radiation-Induced Fault Injection
        Speaker: Maxim De Clercq (EDGX)
      • 175
        Hardening On-Board Software: a Low-Overhead Compiler-based Approach
        Speaker: Mr Emilio Corigliano (Politecnico di MIlano)
    • AI Development , Tools & Simulation Salle 1+2

      Salle 1+2

      Conveners: Alexandre MEGE (Airbus Defence and Space), Filomena Decuzzi
      • 176
        On-Board Data Processing and AI Facility: A Modular Hardware-in-the-Loop Testbed for Space Applications at the Edge
        Speaker: Lyana Usa
      • 177
        Composable AI Pipelines for Onboard Earth Observation Enabling Few-Shot, Hardware-Aware and Sensor-Agnostic Development via Knowledge Distillation
        Speaker: Luca Colomba (AIKO Srl)
      • 178
        Preliminary Design of the Stellar Apps Software Platform for Developing and Executing On-board Applications

        The German Aerospace Center (DLR) is developing Stellar Apps, an on-board application platform designed for space missions. Third-party applications and system services are deployed as Apps. These Apps can be executed in isolated environments with configurable access to the spacecraft and its computing resources. This allows users to regularly add, replace, remove, and update Apps to improve the flexibility and reusability of multipurpose spacecraft. Complex applications can be executed and tested in a secure environment, reducing their time to orbit. API-based communication between Apps and hardware allows the Stellar Apps platform to be used on a wide variety of spacecraft, including satellites, rovers, space stations, and entire satellite constellations. Access to commonly used artificial intelligence libraries and accelerators paves the way for future space applications. Stellar Apps provides end-to-end services ranging from development on the ground to deployment of Apps in space. The platform is currently available as a prototype at the German Aerospace Center (DLR) and is planned for an in-orbit demonstration during the second year of DLR's CAPTn-1 mission. This paper presents the preliminary design of the software platform.

        Speaker: Mr Daniel Lüdtke (German Aerospace Center (DLR))
    • Exhibition Exhibition & Coffee Area

      Exhibition & Coffee Area

    • 11:50
      Wrap-Up & Farewell Lunch