Name: AMICSA & DSP 2016
Start: 2016-06-12T08:00:00+02:00
End: 2016-06-16T18:00:00+02:00
Location: Gothenburg, Sweden

25-Gb/s/Channel VCSEL Driver and Transimpedance Amplifier Array ICs in 0.25-μm SiGe:C BiCMOS Technology for Space Applications (in session "Space applications for analogue and mixed-signal ICs")

65nm technology developments for electronics in the LHC at CERN (in session "Keynote Speech")

"On the design of a rad-hard signal conditioning ASIC for pressure module" (in session "Exhibition")

A 2.56 Gbps Radiation Hardened LVDS/SLVS Receiver in 65 nm CMOS (in session "Full custom digital, analogue, or mixed-signal")

A Lightweight Operating System for the SSDP (in session "Session 5: DSP Software and Applications")

A New Mixed ASIC for Mars Surface Application (in session "Space applications for analogue and mixed-signal ICs")

An Update on Medipix in Space and Future Plans (in session "Space applications for analogue and mixed-signal ICs")

Approval Process of an ESCC Qualified ASIC Supply Chain based on a Mixed-Signal IP Library (in session "Evaluation and qualification of full custom ICs for space applications")

Challenges of Designing a Radiation Tolerant Motion Control System on Chip (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")

Characterization and qualification of microcontrollers and DSPs in extreme temperatures (in session "Session 4: DSP Day Reception and Poster Session")

Comparison Study of Bulk and SOI CMOS Technologies based Rad-hard ADC in Space (in session "Full custom digital, analogue, or mixed-signal")

Design Methodology for mixed signal ASIC with prequalified Analog IPs for space applications (in session "Evaluation and qualification of full custom ICs for space applications")

Development of a Digital Temperature Transducer ASIC in a 28 nm FD-SOI CMOS Process for a Spaceborne Low Power Sensor Bus (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")

Development of a Satellite TV receiver for fibre optic distribution system (in session "Space applications for analogue and mixed-signal ICs")

Digital Programmable Controller (DPC) : from Concepts to Space Applications (in session "Space applications for analogue and mixed-signal ICs")

DSP and FPGA: Competition, Synergy, and Future Integration in Space ASICs (in session "Session 6: IP Cores, FPGAs, and their Synergies with DSPs")

DSP Benchmark Results of the GR740 Rad-Hard Quad-Core LEON4FT (in session "Session 5: DSP Software and Applications")

DVB-S2 Software Defined Radio Modem on the RC64 Manycore DSP (in session "Session 4: DSP Day Reception and Poster Session")

ESA Cosmic Vision MF ASIC and IPs Development (in session "Full custom digital, analogue, or mixed-signal")

ESA DSP Day 2016 - Day 1 Introduction (in session "ESA DSP Day 2016 Introduction")

ESA DSP Day 2016 - Day 2 Introduction (in session "ESA DSP Day - Day 2 Introduction")

ESCC Qualification of Space Components - Schemes and New Opportunities (in session "Session 2: Test, Verification and Qualification of DSP Chips")

European LVDS Development - current status (in session "Full custom digital, analogue, or mixed-signal")

First S-Band capable dual 12bit 1.5GSPS ADC in flip-chip hermetic technology (in session "Full custom digital, analogue, or mixed-signal")

First Telecom Application of Digital and Mixed Component Developments:65nm ASIC and Data Converters (in session "Keynote Speech")

FPGA Radiation Hardening by Design in CMOS65nm (in session "Radiation Effects on analogue and mixed-signal ICs")

High Performance COTS based Computer for Regenerative Telecom Payloads (in session "Session 3: COTS based DSP Systems and Boards")

High Resolution Radiation Hardened DAC in CMOS - SOI Featuring a Return - To - Zero Matrix (in session "Full custom digital, analogue, or mixed-signal")

High-performance DSP for onboard image processing (in session "Session 5: DSP Software and Applications")

Incorporating more in-depth radiation knowledge in the DARE180U analog design kit (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")

MEDA Wind Sensor Front End ASIC (in session "Space applications for analogue and mixed-signal ICs")

MEMS Gyroscope Demonstration for Space Application, using a DPC (in session "Space applications for analogue and mixed-signal ICs")

Multi-core DSP sub-system IP (in session "Session 6: IP Cores, FPGAs, and their Synergies with DSPs")

New rad-hard chip-set for radiometers (in session "Space applications for analogue and mixed-signal ICs")

Octal LVDS Repeater Test Results (in session "Full custom digital, analogue, or mixed-signal")

Open discussion on synergies of DSP and FPGA IP, related user requirements, and industrial views (in session "Round Table Discussion - DSP and FPGA")

Open-Source Instrument Flight Software for CHEOPS (in session "Session 4: DSP Day Reception and Poster Session")

Rad-Hard Microcontroller For Space Applications (in session "Space applications for analogue and mixed-signal ICs")

Radiation Hardened by Design Pipeline Analog-to-Digital Converter Blocks in CMOS 0.18µm Technology (in session "Exhibition")

RADIATION HARDENED HIGH-VOLTAGE AND MIXED-SIGNAL IP WITH DARE TECHNOLOGY (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")

Radiation Intelligent Memory Controller IP Core (in session "Session 4: DSP Day Reception and Poster Session")

Radiation Prediction Tool Dedicated to Analyzing and Hardening by Design readout circuits of photonic ICs (in session "Radiation Effects on analogue and mixed-signal ICs")

Radiation Tolerant CAN Transceiver for Space (in session "Full custom digital, analogue, or mixed-signal")

Radiation-Hardened SiGe BiCMOS Technologies for Analogue and Mixed-Signal ICs (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")

RC64: High Performance Rad-Hard Manycore DSP (in session "Session 1: Rad-Hard DSP Chips")

Scalable Sensor Data Processor: Architecture and Development Status (in session "Session 1: Rad-Hard DSP Chips")

Scalable Sensor Data Processor: Testing and Validation (in session "Session 2: Test, Verification and Qualification of DSP Chips")

SEPHY: An Ethernet Physical Layer Transceiver for Space (in session "Full custom digital, analogue, or mixed-signal")

Serial I/O ADCs/DACs : The Next Giant Leap in Mixed-Signal for Space. (in session "Full custom digital, analogue, or mixed-signal")

Si and CdTe Detector Readout ASIC in 0.35µm CMOS for Energetic Electron Spectroscopy for Taranis (in session "Exhibition")

Single Event Simulation and Error Rate Prediction for Space Electronics in Advanced Semiconductor Technologies (in session "Radiation Effects on analogue and mixed-signal ICs")

SIPHRA 16-Channel Silicon Photomultiplier Readout ASIC (in session "Space applications for analogue and mixed-signal ICs")

SOI CMOS Frequency Synthesizer for Flexible Communications Payloads (in session "Exhibition")

Space Debris Detection on the HPDP, a Coarse-Grained Reconfigurable Array Architecture for Space (in session "Session 5: DSP Software and Applications")

SpaceWire and SpaceFibre Interconnect for High Performance DSPs (in session "Session 3: COTS based DSP Systems and Boards")

Status of the GR718B Product - a Radiation-Tolerant 18x SpaceWire Router for Space Applications (in session "Exhibition")

The Challenges of Digital Signal Processing in Space (in session "Keynote Speech")

The pros and cons of in situ testing - going beyond the test standards (in session "Radiation tests of analogue and mixed-signal ICs")

Total Ionizing Dose Testing of Solid State Power Amplifiers (in session "Radiation tests of analogue and mixed-signal ICs")

Using a Standard Commercial Process for Full Custom Rad Hard Mixed-Signal Design (in session "Radiation-hardened technologies for analogue and mixed-signal ICs")