Speaker
Mrs
Florence Malou
(CNES)
Description
First we will give an overview of Digital Transparent Processor (DTP) development in the frame of FAST project. The DTP is a key element of TAS SpaceFlex processor. DTP development is targeting both commercial and defense satellites. New generation of DTP is able to address high bandwidth, with high capacity with a cost decreases in mass, power consumption and volume per GHz.
Then we will report on the key technologies for DTP. It’s about first 65nm ASIC from TAS-Atmel-STMicroelectronics and E2V data converters. To address the need of high integration, low power consumption, 65nm ASIC offer was developed by ATMEL and STMicroelectronics with CNES and ESA support. This offer incorporates HSSL link. First ASIC was designed by TAS and called VT65. VT65 ASIC was manufactured by Atmel, ST and E2V, using flip-chip technology. VT65 tests are now completed and results are in line with the target.
With CNES support, E2V has designed high speed, large input bandwidth, low power data converters. EV12AD550 ADC ESCC evaluation is started and first test results will be presented, showing very good performances. EV12DS130A DAC is now used in Telecom space programs.
To conclude DTP is a high tech product with high innovation, for drastically enhanced performances, thanks to a constructive collaboration between all the FAST partners, Telecoms, Technologists, Components engineers and Manufacturers.
Primary author
Mrs
Florence Malou
(CNES)
Co-authors
Mrs
Caroline Amiot-Bazile
(CNES)
Mr
Philippe Voisin
(TAS)
