Speaker
Mr
Fredrik Johansson
(Cobham Gaisler)
Description
ABSTRACT
This paper describes the mixed-signal microcontroller GR716 targeting embedded control applications with hard real-time requirements. Prototype devices are currently beeing tape-out in the activity Microcontroller for embedded space applications, initiated and funded by the European Space Agency (ESA). The presentation and paper will describe the mixed digital and analog architecture, performance of the device. This abstract describes an on-going development where the devices are in the stage to be taped-out
BACKGROUND
Software based data acquisition, dataprocessing and simple control applications are widely used in spacecraft subsystems. They allow implementation of software based control architectures that provide a higher flexibility and autonomous capabilities versus hardware implementations. For this type of applications, where limited processor performance is required, general purpose microprocessors are usually considered incompatible due to high power consumption, high pin count packages, need of external memories and missing peripherals. Low-end microcontrollers are considered more attractive in many applications such as:
- Propulsion system control
- Sensor bus control
- Robotics applications control
- Simple motor control
- Power control
- Particle detector instrumentation
- Radiation environment monitoring
- Thermal control
- Antenna pointing control
- AOCS/GNC (Gyro, IMU, MTM)
- RTU control
- Simple instrument control
- Wireless networking
In these kind of applications the microcontroller device should have a relatively low price, a low power consumption, a limited number of pins and must integrate small amount of RAM and most of the I/O peripherals for control and data acquisition (serial I/Fs, GPIO’s, PWM, ADC etc.). The requirements for memory and program length are usually minimal, with no or very simple operating system and low software complexity.
MICROCONTROLLER ARCHITECTURE
The list below summarizes the specification for the complete system:
System Architecture
- Fault-tolerant SPARC V8 processor with 32 register windows and
reduced instruction set
- Double precision IEEE-754 floating point unit
- Advanced on-chip debug support unit with trace buffers and statistic
unit for software profiling
- Memory protection units with 8 zones and individual access control
- Single cycle instructions execution and data fetch from tightly
coupled memory
- Deterministic instruction execution and interrupt latency
- Fast context switching (PWRPSR, AWP, Register partitioning, irq
mapping, SVT, MVT)
- Atomic operations support
Memories
- 192KiB EDAC protected tightly coupled memory with single cycle access
from processor and ATOMIC bit operations.
- Embedded ROM with bootloader for initializing and remote access
- Dedicated SPI Memory interface with boot ROM capability
- I2C memory interface with boot ROM capability
- 8-bit SRAM/ROM (FTMCTRL) with support up to 16 MB ROM and 256 MB SRAM
- Scrubber with programmable scrub rate for all embedded memories and
external PROM/ SRAM and SPI memories
System
- On-chip voltage regulators for single supply support. Capability to
sense core voltage for trimming of the embedded voltage regulator for
low power applications
- Power-on-reset, Brownout detection and Dual Watch Dog for safe
operation. External reset signal generation for reseting companion
chip
- Crystal oscillator support
- PLL for System and SpaceWire clock generation
- Low power mode and individual clock gating of functions and
peripherals
- Temperature and core voltage sensor
- External precision voltage reference for precision measurement
- Programmable DMA controllers with up to 16 individual channel
- Embedded trace and statistics unit for profiling of the system
Peripherals
- SpaceWire with support for RMAP and Time Distribution Protocol
- Redundant MIL-STD-1553B BRM (BC/RT/BM) interface
- Multiple CAN 2.0B bus controllers
- Six UART ports, with 16-byte FIFO
- Two SPI master/slave serial ports
- SPI4SPACE. Hardware support for SPI protocol 0,1 and 2 in HW
- Two I2C master/slave serial port
- PacketWire interface
- PWM with up-to 16 channels. PWM clock support upto 200 MHz
- Up to 64 General input and outputs (GPIO) with external interrupt
capability, pulse generation and sampling
- Four single ended Digital to Analog Converters (DAC), 12-bit at 3MS/s
- Four differential or eight single ended Analog to Digital Converters
(ADC) 11-bit at 200KS/s with programmable pre-amplifier and support
for oversampling. Dual sample and hold circuit integrated for
simultaneously sampling
- External ADC and DAC support up to 16-bit at 1MS/s
I/O
- Configurable I/O selection matrix with support for mixed signals,
internal pull-up/pulldown resistors
- LVDS transceivers for SpaceWire or SPI4SPACE
- Dedicated SPI boot ROM support for configuration
Supply
- Single 3.3V±0.3V supply or separate Core Voltage 1.8V±0.18V, I/O
voltage 3.3V±0.3V
Summary
SUMMARY
The GR716 device is a mixed digital and analogue microcontroller that is based on the well known LEON SPARC V8 architecture. The GR716 device is a prototype for a possible future device targeted at mixed analogue and digital microcontroller applications and will have several new features that are not found in contemporary LEON devices. This includes architectural features to improve determinism, availability of the device in a low pin-count package, and support for the reduced instruction set.
Primary author
Mr
Fredrik Johansson
(Cobham Gaisler)
