Speaker
Dr
Romain PILARD
(Teledyne e2v)
Description
Teledyne e2v has developed a new ADC to meet the high dynamic range as well as channel integration requirements of telecommunications payloads.
It is a quad channel single core 12bit 1.5 GSPS designed by Teledyne e2v on ST Microelectronics BiCMOS9 technology which features 0.13µm CMOS and SiGeC NPN HBT bipolar technology (Ft/Fmax = 166/175GHz). The built-in Cross Point Switch (CPS) allows a multi-mode operation with the possibility to interleave the four independent cores in order to reach higher sampling rates. In 4-channel operation mode, the four cores can sample, in phase, four independent inputs. In 2-channel operating mode, the cores are interleaved by 2 in order to reach 3 GSps sampling rate on each one of two inputs. In 1-channel operating mode, a single input is propagated to each one of the four cores which are interleaved by 4 in order to reach a sampling rate of 6 GSps. The -3dB input bandwidth is more than 5 GHz in order to be able to directly sample signals in the C-band (4-8 GHz). This high flexibility enables the access to microwave-frequency signals with up to 3 GHz of instantaneous bandwidth. It also enables the qualification of a single component which is capable to meet a variety of application needs from single to multi-channels, from baseband to more than 5 GHz of input bandwidth.
The device is built in a non-hermetic flip-chip package using HiTCE (High Coefficient of Thermal Expansion) glass ceramic material in order to reach optimized RF performance and higher pin density.
The new high reliability European flip-chip assembly line deployed by Teledyne e2v is being used for this device. Teledyne e2v is a leader of the flip-chip assembly Working Group which has introduced flip-chip assembly in the ESCC Generic Specification n°9000 in 2016.
The paper will develop the following aspects:
Target noise power ratio performance in multiple Nyquist zones
Cross talk isolation in excess of 70dB at 2.4GHz
Chosen ADC architecture, including built-in Cross-Point Switch for multimode operation
Introduction of chained ADC synchronization for antenna arrays
System benefits of C-Band high dynamic range digitization
Mitigation of radiation effects on ST Microelectronics BiCMOS9 technology.
Choice of package technology: RF performance and 2nd level reliability
Challenges of Flip-Chip assembly at space level.
Summary
Teledyne e2v has developed a new 12bit 1.5/3/6 GSPS quad ADC on ST Microelectronics BiCMOS9 technology, and assembled in Flip-Chip non-hermetic technology.
This device is C-Band capable and features cross talk isolation in excess of 70dB.
The BiCMOS9 technology used features 0.13µm CMOS and SiGeC NPN HBT bipolar technology (Ft/Fmax = 166/175GHz).
The device is assembled in a non-hermetic flip-chip package using HiTCE glass ceramic material in order to reach optimized RF performance and higher pin density.
Primary author
Dr
Romain PILARD
(Teledyne e2v)
Co-authors
Mr
Bellin Dominique
(Teledyne e2v)
Mr
Chantier Nicolas
(Teledyne e2v)
Mr
Khaled Salmi
(Teledyne e2v)
Mr
Matthieu Martin
(Teledyne e2v)
Ms
Monier Vanessa
(Teledyne e2v)
Mr
Peltier Jean-Philippe
(Teledyne e2v)
Mr
Wagner Gregory
(Teledyne e2v)
