Speaker
Mr
Kostas Makris
(ISD S.A)
Description
We present the test results of a radiation hardened, high resolution ADC for space applications. The ADC is a low-noise, low sampling rate, radiation hardened device optimized to operate in a frequency range from DC to 40kHz. The ADC has been implemented in the 150nm CMOS-SOI process of Atmel following a rigorous design flow and radiation hardening strategy. The ADC features a fully differential analog input voltage interface with a dynamic range of +/-3.3V. A sampling rate of a up to 240kSPS is possible thanks to the selectable Over-sampling Ratio which can be as high as 2048. At low sampling rates, the ADC can achieve a very high SNR of up to 108dB over the entire dynamic range, which is translated to an ENOB of 18bits in terms of noise performance. The static and dynamic performance of the device has been tested in a radiation environment of up to 300krad Total Dose and a maximum LET of 88.4 MeV/mg/cm2 using heavy-ions exhibiting no hard fail, no serious performance degradation or latch up.
Primary author
Mr
Kostas Makris
(ISD S.A)
Co-authors
Mr
Boris Glass
(ESA)
Mr
Christian POIVEY
(ESA)
Dr
Constantin Papadas
(ISD SA)
Mr
Dimosthenis Fragopoulos
(ISD S.A.)
Mr
Efthimios Karaolis
(ISD S.A.)
Mrs
Olga Dokianaki
(ISD S.A.)
Mr
Onoufrios Markakis
(ISD S.A.)
Mr
Panagiotis Vagiannis
(ISD S.A.)
Mr
Vlachakis Georgios
(ISD S.A.)
