SEFUW: SpacE FPGA Users Workshop, 4th Edition

Session

Reconfiguration

10 Apr 2018, 12:40

Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Conveners

Reconfiguration

• AURELIEN ODOUNDE (CNES)

Reconfiguration

• AURELIEN ODOUNDE (CNES)

31. Modern On-Board-Processing based on FPGAs for Flexible Satellite Communication

Mr Florian Rittner (Friedrich-Alexander-Universität Erlangen-Nürnberg)

10/04/2018, 12:40

Flexible satellite payloads are important for the use cases of modern satellite constellations. A reconfigurable On- Board- Processor (OBP) based on Field-Programmable Gate Array (FPGA) technology provides the needed flexibility and enables adaptable signal filtering, regeneration, and switching / routing by reconfiguration of the digital signal processing chain. Additionally, new powerful...

33. FPGA Based Multithreading for On-Board Processing

Mr Andrea Guerrieri (EPFL), Mr Bilel Belhadj (Syderal), Mr Pasquale Lombardi (Syderal)

10/04/2018, 14:00

FPGA (Field Programmable Gate Array) is an attractive technology for high speed data processing in space missions due to its unbeatable flexibility and best performance to power ratio, in comparison to software. However FPGAs suffer from two major drawbacks. First, higher programming effort is required with respect to software and, second, hardware resources need to be allocated for each...

38. Controlling Concurrent Change in Aerospace Electronics

Dr Björn Fiethe (IDA TU Braunschweig)

10/04/2018, 14:40

Space missions have to handle very high data rates due to increased spatial, radiometric and time resolutions of payload instruments already now. To be able to handle this amount of data, final physical values have to be extracted in real time by an autonomous, intelligent and reliable application already on board the spacecraft, adapting itself to the changing needs in a controlled...

39. Overlay Architectures for Space Applications

Dr Jose Sousa (IPbloq)

10/04/2018, 15:00

If a reconfigurable architecture is synthesized on commercial of the shelf (COTS) FPGAs it is called an overlay architecture. Overlays are portable, allows the user to abstract from the FPGA resources used, and is orders of magnitude faster to configure compared to FPGAs. In this communication we present an overlay architecture consisting of one or more RISC-V CPUs and one or more IPBloq...