The effects produced by radiation on integrated circuits can be classified into Single Event Effects (SEE) related to transient problems and Total Ionization Dose (TID) effects that arise due to the long exposure time ionizing radiation. The mitigation of these effects on integrated circuits can be done in three ways: Manufacturing Process Level, Architectural Level (redundancy) and Layout Level. The work presented here deals with the third way of mitigation, that is, the cell library design of radiation tolerant integrated circuits. Designed and manufactured in silicon on 150nm technology, the SMDH-RH library is based on the use of guard rings and the application of closed geometry techniques (ELT – Enclosed Layout Transistor). The library includes simple and complex digital logic gates. It was tested in space as payload of a nanosatellite (NanosatC-Br1), launched in space in 2014 and still in activity, being approved its operation and functionality.