17-19 March 2020
European Space Research and Technology Centre (ESTEC)
Europe/Amsterdam timezone
UPDATE 02 March 2020: please be informed that SEFUW has been postponed. More information will be posted here in due course.

Harsher-than-space: Fault injection and user-based RHBD in the age of rad-tolerant and rad-hard devices

17 Mar 2020, 15:20
Newton 1 and 2 (European Space Research and Technology Centre (ESTEC))

Newton 1 and 2

European Space Research and Technology Centre (ESTEC)

Keplerlaan 1 2201AZ Noordwijk ZH The Netherlands
Fault Tolerance Methodologies and Tools Fault Tolerance Methodologies and Tools


Hipólito Guzmán-Miranda (Universidad de Sevilla)


SRAM-based FPGAs have permeated the space sector for multiple data processing applications. FPGA vendors provide this market with devices with different levels of radiation tolerance. While devices must be chosen with enough manufacturer-provided fault tolerance for each specific mission, occasionally users may want to add extra application-specific fault tolerance mechanisms, in order to increase tolerance to soft errors.

For that purpose, fault injection is an established technique that allows emulating soft errors, predicting the Architecture Vulnerability Factor of designs and modules, and also identifying the main contributors to output error rates, which can later be hardened by the user, for example using TMR or other error detection and correction mechanisms.

The FT-Unshades2 platform is a flexible platform that can be used to assess both digital and analog designs, as it includes both an FPGA-based emulator for digital designs and an analog simulation tool for analog circuits. The most recent updates to the platform will be described, such as the addition of new fault classifiers, generation of faulty outputs in vcd format, and improvement of analog simulation speed.

Additionally, a new fault injection platform, FTU-VEGAS, has been developed for the NanoXplore NG-MEDIUM FPGA. The platform allows to perform both fault injection and radiation testing of the device, with the intention of bridging the gap between both worlds. Users may use the platform in case of needing extra fault tolerance for specific applications.

Finally, the triple_logic package, a permissively-licensed VHDL package for automatic hardening of user-specified signals and registers, will be described. The package allows users to harden the most critical parts of their design, after identifying them through fault injection experiments.

Primary authors

Hipólito Guzmán-Miranda (Universidad de Sevilla) Mrs María Muñoz-Quijada (Universidad de Sevilla) Dr José Ramón García-Oya (Universidad de Sevilla) Mr Jorge Jiménez-Sánchez (Universidad de Sevilla) Mr Luis Sanz Dr Fernando Márquez-Lasso (Universidad de Sevilla) Prof. Fernando Muñoz (Universidad de Sevilla)

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