SEFUW: SpacE FPGA Users Workshop, 5th Edition

Contribution List

36. Challenges with New FPGA Technologies

Isaac Tejerina Bustillo (Airbus Defence & Space)

17/03/2020, 10:00

Industrial Experiences

Industrial Experiences

Since years Airbus Defence and Space capitalizes on the advantages of Field Programmable Gate Array Technologies and has accumulated considerable heritage and experiences with it.
The presentation will provide an overview of the application domains and the FPGA devices that address those application fields. Particular consideration will be payed towards the experiences associated with the new...

35. MPSOCS FOR RECONFIGURABLE MODULAR SPACECRAFT

Matthew Rowlings (Staff)

17/03/2020, 10:25

Industrial Experiences

Industrial Experiences

Modular, reconfigurable spacecraft offer a new approach to extending mission capability and maximising the lifetime of a spacecraft. Future uses of space robotics such as in-orbit construction and servicing allow faulty or obsolete parts of a modular spacecraft to be replaced by servicer spacecraft that dock with their targets and perform upgrades and maintenance. Such manoeuvres will require...

14. Development and FPGA Roadmap for LEON5FT and NOEL-V Processor Models

Mr Martin Ronnback (Cobham Gaisler)

17/03/2020, 10:50

Industrial Experiences

Industrial Experiences

Cobham Gaisler has developed two new processor models. LEON5 is a continuation of the LEON line of SPARC processors and NOEL-V is the first implementation from Cobham Gaisler of the open RISC-V instruction set architecture.

As with earlier generations of processor IP core implementations from Cobham Gaisler, the new processor models target both FPGA and ASIC target technologies. Since the...

40. SpaceFibre and SpaceWire IP cores for radiation tolerant FPGAs

Dr Chris McClements (STAR-Dundee), Steve Parkes (STAR-Dundee)

17/03/2020, 11:15

Industrial Experiences

Industrial Experiences

STAR-Dundee has extensive experience with demanding applications on radiation tolerant FPGA devices utilising SpaceWire and SpaceFibre. The SpaceFibre Interface Single-Lane and Multi-Lane IP cores have been implemented very efficiently in radiation-tolerant FPGAs utilising the high-speed SerDes integrated in capable devices including the Virtex 5QV, Microchip RTG4 and Xilinx Ultrascale...

3. Getting Started with OSVVM, VHDL's #1 Verification Methodology

Jim Lewis (SynthWorks Design Inc.)

17/03/2020, 11:40

Design Flow

Design Flow

Open Source VHDL Verification Methodology (OSVVM) is an advanced verification methodology and library that simplifies the creation of structured, transaction-based tests and test environments that are powerful enough for ASIC verification, yet simple enough for small FPGA verification.

OSVVM is implemented as two separate open source libraries: OSVVM Utility Library and OSVVM Verification...

6. Using Static RTL Analysis to Accelerate Space FPGA Verification

Mr adam adam taylor (Adiuvo Engineering & Training Ltd)

17/03/2020, 12:10

Design Flow

Design Flow

Developing FPGAs which work across reliably in flight requires considerable thought. Reinforcing this challenge is that 84% of commercial FPGA designs make it to production with a non trivial error (source mentor graphics / wilson group survey).

To reduce the risk of a fault making it to flight or being found very late in the program. There need to be a number of rules followed for best...

22. A UML Profile for VHDL FPGA Designs.

Mr Harald Ottacher (Space Research Institute / Austrian Academy of Sciences)

17/03/2020, 12:35

Design Flow

Design Flow

To perform the design of an FPGA project, several graphical representations of the later coded implementation of the FPGA function can be used.
The usage of hardware description languages for the implementation enables also design approaches and representations that are used for software designs, as a basis for the FPGA implementation, like the well defined Unified Modeling Language...

9. Saving Power and System Cost with Microchip Radiation Tolerant FPGAs

Mr Ken O'Neill (Microchip Technology)

17/03/2020, 14:00

FPGA Vendors

FPGA Vendors

In this presentation we will review the features of Microchip’s RTG4 radiation tolerant FPGAs, and provide an update on radiation effects and qualification status. We will also review component screening options for high-volume, low-cost satellite constellations, where non-traditional trade-offs between cost and screening are available. Lastly, we will look forward to the next generation of...

7. Automation of achieving Functional Safety and Highly Reliable Design

Mr Philipp Jacobsohn (Synopsys GmbH)

17/03/2020, 15:00

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Industry standards including DO-254, IEC 61508 and ISO 26262 define functional safety and error mitigation strategies for the creation and validation of high reliability systems. The Synplify Premier tool automates industry methods for mitigating soft errors such as single-event upsets (SEUs) that are increasingly present in the latest FPGA process geometries. Synplify Premier provides...

27. Harsher-than-space: Fault injection and user-based RHBD in the age of rad-tolerant and rad-hard devices

Hipólito Guzmán-Miranda (Universidad de Sevilla)

17/03/2020, 15:20

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

SRAM-based FPGAs have permeated the space sector for multiple data processing applications. FPGA vendors provide this market with devices with different levels of radiation tolerance. While devices must be chosen with enough manufacturer-provided fault tolerance for each specific mission, occasionally users may want to add extra application-specific fault tolerance mechanisms, in order to...

37. VeriPy: A Python Framework for the analysis and mitigation of soft-errors effects in SRAM-based FPGAs

Dr Corrado De Sio (Politecnico di Torino)

17/03/2020, 15:45

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Nowadays, SRAM-based FPGAs are becoming a common choice for space applications due to their main features such as reconfigurability, low costs and high-performance. However, SRAM-based FPGAs are also sensitive to several effects caused by ionizing radiations which leads to misbehavior of these devices. Therefore, a pre-deployment analysis and tackle of the effects caused by radiation-induced...

38. Accurate Estimation of NXmap Circuit Performance and Reliability by Static Analysis and Simulation

Prof. Luca Sterpone (Politecnico di Torino)

17/03/2020, 16:00

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

A set of CAD tools to elaborate and analyze the netlist generated by the NXmap tool is presented. In this presentation we will focus on the development of two tools: a static-analyzer of the post-layout netlist generated by NXmap and oriented to the analysis of Soft-Errors into NG-Medium FPGA and PySETA, a tool for the analysis and propagation of Single Event Transients into the circuit...

44. New extensions for the LEON2FT IP core

Dr Martin Danek (daiteq)

17/03/2020, 16:15

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

This talk will describe new extensions for the ESA LEON2FT IP core. The first part will present four new technology mapping targets that were added to the package - Xilinx Spartan 6, Virtex 7, MicroSemi PolarFire and NanoXplore NG-Medium. The second part will outline new arithmetic extensions for LEON2FT: a new modular FPU that supports arbitrary precision and packed formats, and new integer...

45. Webex session: Methods for Mission-Critical Survivability Analysis

Ms Melanie Berg (Space R2 LLC)

18/03/2020, 09:00

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Abstract: For critical space-applications, single event upset (SEU) data are gathered to determine if the mission’s survivability requirements are satisfied. When performing failure analysis on a mission’s FPGA applications, it is common practice to use simple test structures that focus on the FPGA’s discrete internal components. It is also common practice that SEU parameters obtained from...

13. Methodologies and tools to efficiently perform fault campaigns to measure functional safety

Mr Joerg Richter (Group Director R&D, Verification Group)

18/03/2020, 09:50

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Aerospace and Avionics ICs reliability depends on their ability to withstand the effects of radiation that naturally occurs in space and the Earth’s atmosphere. Radiation can cause Single Event Upsets (SEUs) and other types of faulty behavior in the design elements, which is transient by nature (recovery is possible). ICs are also susceptible to silicon aging effect, which may result in...

23. Configuration Memory Scrubber for the Xilinx Zynq-7000 FPGA based on a 2D coding scheme

Mihalis Psarakis (University of Piraeus, Greece)

18/03/2020, 10:10

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Modern programmable SoCs, such as the Xilinx Zynq-7000 APSoC FPGAs, provide an attractive COTS platform for building high-performance, miniaturized systems in space avionics. However, since SRAM FPGAs are vulnerable in radiation-induced effects, fault tolerance techniques must be developed to support their proliferation in critical applications. SEE mitigation approaches usually combine...

1. FPGA Based Reconfigurable On-Board Payload Processing for an Exploratory In-Orbit Verification of an E-Band (71-76 GHz) Satellite Link (EIVE)

Ms Laura Manoliu (University of Stuttgart)

18/03/2020, 10:30

Reconfiguration

Reconfiguration

To develop new frequency bands for broadband satellite communications and to ensure the constantly growing demand for higher data rates, the EIVE project proposes the world’s first in-orbit verification of a communication link in E-Band on a CubeSat system. A data downlink is planned in the frequency range of 71-76 GHz, allowing 5 GHz radio frequency data bandwidth, from a nanosatellite to a...

16. Use of Cyclone V SoC in OPS-SAT mission of ESA

Vasundhara Shiradhonkar

18/03/2020, 10:55

Reconfiguration

Reconfiguration

OPS-SAT is using Intel’s Cyclone V SoC in its experiment processing platform. Since the mission is entirely about experimentation, this SoC will be used for different purposes. Experiments range from FPGA based machine learning algorithms to Linux based communication applications. It is the need of the mission to safely reconfigure the SoC in space according to the experiment requirements. The...

42. FPGA continuous integration

Florent MAnni (DC/TV/IN)

18/03/2020, 11:50

Design Flow

Design Flow

In the beginning of this year, CNES conducted a one month project with three Students from Enseeiht School. The purpose was to try and gather feedback about continuous integration of FPGA development. The use case was a RiscV ioptimized processor targetting NanoXplore Medium FPGA. The tools used for this presentation were: Git, Gitlab,Gitlab-Ci,Doxygen,Sonarqube-Rulechecker,Cocotb,Nxmap,Ghdl....

19. UVVM usage is exploding. A brief introduction and all the new stuff for this standardised VHDL verification methodology.

Mr Espen Tallaksen (Bitvis)

18/03/2020, 12:10

Design Flow

Design Flow

Verification is critical for an acceptable FPGA quality. Unfortunately, achieving a good FPGA quality is often very time consuming. However, with a good testbench architecture the workload could be reduced significantly. UVVM provides the best VHDL testbench architecture possible and also allows a unique reuse structure. Entry level UVVM is dead simple even for beginners, and for more advanced...

31. Accelerating the Journey from C/C++ to Hardware

Mr Pantelis Sarais (Silexica)

18/03/2020, 12:40

Design Flow

Design Flow

High-Level Synthesis (HLS) methodologies is proposed since around 15 years as a promising design methodology. Nevertheless, software engineers are still not able to get the maximum benefit from HLS due to the required knowledge about both parallelism and the specific FPGA hardware architecture. This presentation will explore the common design challenges engineers face when using HLS and how...

25. Xilinx’s Adaptive FPGAs for Space Applications

Ms Minal Sawant (Xilinx Inc.)

18/03/2020, 14:00

FPGA Vendors

FPGA Vendors

With need for rapid deployment of flexible payloads and capability to process complex data in space, the requirements for cutting-edge FPGAs that can address this need is quickly growing. To enable technology in the new applications particularly to improve bandwidth, accommodate increasing number of channels in high performance data handling, a high level of gate density, embedded high speed...

10. Computer Vision Acceleration on NG-MEDIUM and NG-LARGE FPGAs for Rovers

Dr George Lentaris (National Technical University of Athens, Greece)

18/03/2020, 15:00

FPGAs: High Performance

FPGAs: High Performance

The high-performance and reconfiguration capabilities offered by the new European FPGA technology can be leveraged in planetary exploration scenarios, where rover autonomy relies on multiple diverse and computationally intensive algorithms for Computer Vision. A number of HW/SW pipelines for rover localization and mapping were developed on Xilinx technology during past ESA activities...

15. Modulable architecture for image processing systems

Mr Rubén Domingo Torrijos (GMV)

18/03/2020, 15:25

FPGAs: High Performance

FPGAs: High Performance

Vison-based navigation systems make use of image processing algorithms which are very computationally demanding in terms of memory and processing load.
In space domain the development of robust and efficient vision-based navigation systems is a key point to implementing autonomous navigation systems used in space exploration, active debris removal and rover vehicles. However, the tight...

11. Performance Assessment of Onboard CCSDS Forward Error Correction on Space FPGAs

Nektarios Kranitis (Dept. of Informatics & Telecommunications, National and Kapodistrian University of Athens)

18/03/2020, 15:50

FPGAs: High Performance

FPGAs: High Performance

Forward Error Correction (FEC) is a mission critical onboard data processing task, providing continuous and reliable data transfers to ground stations even at low Signal-to-Noise Ratio (SNR) regimes.

The Consultative Committee for Space Data Systems (CCSDS) has standardized a number of protograph-based Quasi-Cyclic Low-Density Parity-Check (QC-LDPC) codes for deep-space (AR4JA) and...

39. RTG4 FPGA in ATHENA WFI

Dr Markus Plattner (Max Planck Institute for extraterrestrial Physics)

18/03/2020, 16:45

FPGAs: High Performance

FPGAs: High Performance

The Wide-Field-Imager (WFI) instrument onboard ATHENA will be based on x-ray detectors that are read-out by frame processor modules. The core component of these modules is a Microchip RTG4 FPGA. For the last four years, the WFI team has been developing implementations that allow real-time processing of data streams. Further, we have investigated the use of softcores that can be implemented as...

26. The data processing unit for the PMI instrument aboard the Lagrange mission

Juan Pedro Cobos Carrascosa (Institute of Astrophysics of Andalusia)

18/03/2020, 17:10

FPGAs: High Performance

FPGAs: High Performance

The Photospheric Magnetic Field Imager (PMI) will be one of the payload instruments onboard the Lagrange mission. It will provide magnetograms and tachograms of the solar photospheric plasma as valuable information for being used in space weather diagnostics. The Polarimetric and Helioseismic Imager onboard Solar Orbiter (SO/PHI) is the major heritage instrument for PMI. Its DPU, however, does...

34. NanoXplore NXmap-v3 features and updated NX products portfolio

Mr JOEL LE MAUFF (NanoXplore)

19/03/2020, 09:00

FPGA Vendors

FPGA Vendors

This year, NX presentation will address 2 majors topics:
1. The NXmap-v3 features
2. As well as we will update the NX products portfolio.
NXmap-v3 is the brand new NXmap tool suite developed in order
1. to support High-End FPGA devices,
2. as well as to introduce many additional features.

NX presentation will describe all new features versus the previous NXmap v2.9.7 released by...

30. Fault tolerance analysis of iterative processing data-paths

Dr Alexandru Amaricai (University Politehnica Timisoara)

19/03/2020, 10:00

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

Reliability in digital circuits that operate in radiation prone environments is achieved with significant cost increase. The classical generic solution based on triple modular redundancy triples the cost.
In this work, we present a novel perspective of enhancing the fault tolerance of digital circuits, by employing iterative structures in the processing data-paths. We start by presenting a...

12. Radiation tolerant CAN controller for Xilinx FPGAs

Simon Voigt Nesbo (Western Norway University of Applied Sciences)

19/03/2020, 10:25

Fault Tolerance Methodologies and Tools

Fault Tolerance Methodologies and Tools

The Controller Area Network (CAN) bus protocol defines a fault-tolerant multi-master serial protocol. Originally it was intended for use in vehicles, but the robustness of the CAN protocol has made it a popular choice in a wide range of control applications, also in the radiation environments seen in space applications or high-energy physics experiments. Electronics designed for radiation...

41. Xilinx Machine Learning Solutions and Design Considerations for Space Applications

Mr Jason Vidmar (Xilinx Corp)

19/03/2020, 11:20

Artificial Intelligence/Machine Learning

Artificial Intelligence/Machine Learning

In the past decade, the field of Machine Learning has witnessed dramatic breakthroughs in the state of the art for tasks such as image classification and object detection, aided by advancements in algorithms, training data and computing architectures. To date, most results have been demonstrated for terrestrial applications, but there is significant demand for solutions that can scale these...

2. Image Recognition for Space Applications using Deep Learning on FPGAs & SoCs

Stephan van Beek (MathWorks)

19/03/2020, 11:45

Artificial Intelligence/Machine Learning

Artificial Intelligence/Machine Learning

Artificial intelligence (Deep Learning) is everywhere. Home appliances, automotive, entertainment systems, you name it, they are all packing AI capabilities. The space industry is no exception. Automated recognition of spacecraft and space junk using imaging plays an important role in securing space safety and space exploration. Although Deep Learning is the most successful solution for...

29. FPGA implementation of Cloud Detection algorithm based on Convolutional Neural Network for Earth Observation applications On board

Mr Giamarco Dinelli (University Of Pisa), Mr Gionata Benelli (IngeniArs)

19/03/2020, 12:10

Artificial Intelligence/Machine Learning

Artificial Intelligence/Machine Learning

In the last years, Machine Learning has rose in popularity, and also the space community has started to consider AI-based algorithms as a promising solution for tasks such as spacecraft navigation and on-board image elaboration. ESA project CloudScout, flying on mission PhiSat-1/FSSCAT on-board a 6U CubeSat, has the aim to show the feasibility of AI-based algorithms in orbit to perform...

24. Intel’s Solution for Fast and Efficient Inference

Ms Ruth Abra (Intel)

19/03/2020, 12:35

Artificial Intelligence/Machine Learning

Artificial Intelligence/Machine Learning

The understanding of the power of AI is increasing with its usage and ongoing research. Convolutional Neural Networks excel at object recognition, object detection and image segmentation; LSTMs and transformers lead the way in sequence analysis, including translation and search engine tasks. Loosely based on the micro-level architecture of the brain, these networks can – like the brain – be...

20. FUSIO RT update: First European Space Computer Core, Ready to use

Mrs Coralie Dang Feller (3DPLUS)

19/03/2020, 14:00

FPGA Vendors

FPGA Vendors

New Space applications require more compactness, and modularity, in a global context of increasing overall performances. During 2018 SEFUW conference, we introduced the concept of our Computer Core FUSIO RT project under CNES R&T activity. The goal of the presentation is to provide with the latest information related to this solution (available since 2019) in terms of technology and...

18. 3D PLUS CONFIGURATION MEMORY SOLUTIONS

Mrs Jeanne TONGBONG

19/03/2020, 14:15

Reconfiguration

Memories

Most of the latest High-End FPGAs are SRAM-based. They present high performance, high density (more configurable resources), high flexibility (partial reconfiguration and thus are widely deployed in space applications primarily for payload type applications. The SRAM-based FPGAs require a configuration memory to reload the configuration pattern when powered-on. The main requirement for a...

43. High Performance Memories To Augment Space FPGA s

Dr Helmut Puchner (Cypress Semiconductor)

19/03/2020, 14:25

Reconfiguration

Memories

We present our portfolio of QML-V certified high speed cache QDR SRAM devices which are boosting the memory throughput performance of space grade FPGA's. In addition, we introduce our high density NOR Flash boot memory solutions and ecosystems to support all modern space grade FPGA's.

32. First Design-In Experiences and Comparison of KU060, NG-ULTRA and RTPolarFire for On-Board Processing and AI

Dr Rajan Bedi (Spacechips)

19/03/2020, 14:50

Industrial Experiences

Industrial Experiences

Spacechips develops ultra high-throughput on-board processing and transponder products for telecommunication, Earth-Observation, internet and M2M/IoT satellites. We compare and share design-in experiences of the latest ultra deep-submicron space-grade FPGAs and MPSoCs: Xilinx's, 20 nm, Kintex UltraScale KU060, NanoXplore's 28 nm NG-ULTRA and Microchip's 28 RFPolarFire.

Xilinx's KU060 and...

8. Flexible FPGA Architecture for Compact High-Performance PDHU and OBC Mass Memory

Dr Gang Zhou (DSI Aerospace Technologie GmbH )

19/03/2020, 15:15

Industrial Experiences

Industrial Experiences

The dilemma of on-board payload data-processing units has not changed for decades: the resolution of remote sensing units is continually increasing so that the data rate is ever-increasing while the downlink bandwidth remains limited. The demand on compact and high-performance data handling and data storage modules is growing rapidly. The design must be scalable and very flexible to meet...

28. Xilinx Zynq Ultrascale+ MPSoC-based modular unit for rapid spacecraft hardware prototyping

Mr Michael Walshe (Thales Alenia Space)

19/03/2020, 15:40

Industrial Experiences

Industrial Experiences

Thales Alenia Space in the UK have developed a modular unit for rapid spacecraft system prototyping based on the Xilinx Zynq UltraScale+ MPSoC. The unit is delivered in Compact PCI (CPCI) form factor and supports a mixture of Space and Terrestrial TM/TC and Data interfaces:
• SpaceWire x 3
• SpaceFibre x 2
• CAN x 2
• 1553 x 2
• RS422 UART x 2
• Gigabit Ethernet x 2
• USB2.0/3.0 x...

17. Designing a low-latency Fail-operational motor controller for space on industrial-grade FPGAs

Aloïs Wolff (Watt&Well)

19/03/2020, 16:05

Industrial Experiences

Industrial Experiences

Permanent Magnet Synchronous Motor (PMSM) control is a field where real-time processing capabilities play a substantial role in the system’s performance. The usual tradeoff for the processing elements amounts to choosing between a DSP or an FPGA, with the latter seen as more complex to develop and maintain.

This tradeoff usually does not hold out against the specific constraints in the...