Speaker
Description
A set of CAD tools to elaborate and analyze the netlist generated by the NXmap tool is presented. In this presentation we will focus on the development of two tools: a static-analyzer of the post-layout netlist generated by NXmap and oriented to the analysis of Soft-Errors into NG-Medium FPGA and PySETA, a tool for the analysis and propagation of Single Event Transients into the circuit architecture of NanoXplore FPGA. The results will be compared with NanoXmap simulators and Fault Injection. We will demonstrate the possible application on the verification of robustness and mitigation techniques applied on a set of test-bench circuits implemented on the NG-MEDIUM device. Experimental results obtained by simulation will be commented and discussed in details